[Mesa-dev] [PATCH 13/18] i965: Pass slice details as parameters for surface setup

Matt Turner mattst88 at gmail.com
Thu Apr 23 11:54:01 PDT 2015


On Wed, Apr 22, 2015 at 1:47 PM, Topi Pohjolainen
<topi.pohjolainen at intel.com> wrote:
> Also changed a couple of direct shifts into SET_FIELD().
>
> Signed-off-by: Topi Pohjolainen <topi.pohjolainen at intel.com>
> ---
>  src/mesa/drivers/dri/i965/brw_context.h           |  3 ++-
>  src/mesa/drivers/dri/i965/brw_wm_surface_state.c  | 30 +++++++++++++----------
>  src/mesa/drivers/dri/i965/gen7_wm_surface_state.c | 14 +++++------
>  src/mesa/drivers/dri/i965/gen8_surface_state.c    | 10 +++-----
>  4 files changed, 29 insertions(+), 28 deletions(-)
>
> diff --git a/src/mesa/drivers/dri/i965/brw_context.h b/src/mesa/drivers/dri/i965/brw_context.h
> index b90d329..ae28955 100644
> --- a/src/mesa/drivers/dri/i965/brw_context.h
> +++ b/src/mesa/drivers/dri/i965/brw_context.h
> @@ -964,10 +964,11 @@ struct brw_context
>     {
>        void (*update_texture_surface)(struct brw_context *brw,
>                                       const struct intel_mipmap_tree *mt,
> -                                     struct gl_texture_object *tObj,
>                                       uint32_t tex_format,
>                                       bool is_integer_format,
>                                       GLenum target, uint32_t effective_depth,
> +                                     uint32_t min_layer,
> +                                     uint32_t min_lod, uint32_t mip_count,

Trailing whitespace.

>                                       int swizzle, uint32_t *surf_offset,
>                                       bool for_gather);
>        uint32_t (*update_renderbuffer_surface)(struct brw_context *brw,
> diff --git a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
> index f7acad4..ad5ddb5 100644
> --- a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
> +++ b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
> @@ -310,16 +310,16 @@ update_buffer_texture_surface(struct gl_context *ctx,
>  static void
>  brw_update_texture_surface(struct brw_context *brw,
>                             const struct intel_mipmap_tree *mt,
> -                           struct gl_texture_object *tObj,
>                             uint32_t tex_format,
>                             bool is_integer_format /* unused */,
>                             GLenum target,
>                             uint32_t effective_depth /* unused */,
> +                           uint32_t min_layer /* unused */,
> +                           uint32_t min_lod, uint32_t mip_count,

Trailing whitespace.

>                             int swizzle /* unused */,
>                             uint32_t *surf_offset,
>                             bool for_gather)
>  {
> -   struct intel_texture_object *intelObj = intel_texture_object(tObj);
>     uint32_t *surf;
>
>     surf = brw_state_batch(brw, AUB_TRACE_SURFACE_STATE,
> @@ -361,16 +361,16 @@ brw_update_texture_surface(struct brw_context *brw,
>
>     surf[1] = mt->bo->offset64 + mt->offset; /* reloc */
>
> -   surf[2] = ((intelObj->_MaxLevel - tObj->BaseLevel) << BRW_SURFACE_LOD_SHIFT |
> -             (mt->logical_width0 - 1) << BRW_SURFACE_WIDTH_SHIFT |
> -             (mt->logical_height0 - 1) << BRW_SURFACE_HEIGHT_SHIFT);
> +   surf[2] = SET_FIELD(mip_count, BRW_SURFACE_LOD) |
> +             SET_FIELD(mt->logical_width0 - 1, BRW_SURFACE_WIDTH) |
> +             SET_FIELD(mt->logical_height0 - 1, BRW_SURFACE_HEIGHT);
>
> -   surf[3] = (brw_get_surface_tiling_bits(mt->tiling) |
> -             (mt->logical_depth0 - 1) << BRW_SURFACE_DEPTH_SHIFT |
> -             (mt->pitch - 1) << BRW_SURFACE_PITCH_SHIFT);
> +   surf[3] = brw_get_surface_tiling_bits(mt->tiling) |
> +            SET_FIELD(mt->logical_depth0 - 1, BRW_SURFACE_DEPTH) |
> +            SET_FIELD(mt->pitch - 1, BRW_SURFACE_PITCH);

Remove the tabs in these two lines.


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