[Mesa-dev] [PATCH v2 08/20] i965/fs: Add emit_cs_terminate to emit CS_OPCODE_CS_TERMINATE

Jordan Justen jordan.l.justen at intel.com
Fri Apr 24 23:44:46 PDT 2015


On 2015-04-24 23:11:13, Kenneth Graunke wrote:
> On Friday, April 24, 2015 04:33:00 PM Jordan Justen wrote:
> > v2:
> >  * Do more work at the visitor level. g0 is loaded and sent to the
> >    generator now.
> > 
> > Signed-off-by: Jordan Justen <jordan.l.justen at intel.com>
> > ---
> >  src/mesa/drivers/dri/i965/brw_fs.h           |  1 +
> >  src/mesa/drivers/dri/i965/brw_fs_visitor.cpp | 19 +++++++++++++++++++
> >  2 files changed, 20 insertions(+)
> > 
> > diff --git a/src/mesa/drivers/dri/i965/brw_fs.h b/src/mesa/drivers/dri/i965/brw_fs.h
> > index 4e17d44..b1e65cd 100644
> > --- a/src/mesa/drivers/dri/i965/brw_fs.h
> > +++ b/src/mesa/drivers/dri/i965/brw_fs.h
> > @@ -387,6 +387,7 @@ public:
> >                                   bool use_2nd_half = false);
> >     void emit_fb_writes();
> >     void emit_urb_writes();
> > +   void emit_cs_terminate();
> >  
> >     void emit_shader_time_begin();
> >     void emit_shader_time_end();
> > diff --git a/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp b/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
> > index 11f38c2..ba8b811 100644
> > --- a/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
> > +++ b/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
> > @@ -4154,6 +4154,25 @@ fs_visitor::resolve_ud_negate(fs_reg *reg)
> >     *reg = temp;
> >  }
> >  
> > +void
> > +fs_visitor::emit_cs_terminate()
> > +{
> > +   assert(brw->gen >= 7);
> > +
> > +   /* We are getting the thread ID from the compute shader header */
> > +   assert(stage == MESA_SHADER_COMPUTE);
> > +
> > +   /* Copy g0 for the message payload */
> 
> Perhaps add a comment like:
> 
> /* We can't directly send from g0, since sends with EOT have to use
>  * g112-127.  So, copy it to a virtual register,  The register allocator
>  * will make sure it uses the appropriate register range.
>  */

Ok. It sounds good to me. Unless you can think of some better wording
based on the link below.

> I was going to suggest sending from g0, but I'm guessing this is why you
> don't.  (I wonder if it's really necessary for compute...seems wise to
> do for now though...)

Luckily someone already looked into this for us. ;)

http://lists.freedesktop.org/archives/mesa-dev/2015-March/079565.html

> Patches 1-9 are:
> Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>

Thanks!

-Jordan

> > +   struct brw_reg g0 = retype(brw_vec8_grf(0, 0), BRW_REGISTER_TYPE_UD);
> > +   fs_reg payload = fs_reg(GRF, alloc.allocate(1), BRW_REGISTER_TYPE_UD);
> > +   fs_inst *inst = emit(MOV(payload, g0));
> > +   inst->force_writemask_all = true;
> > +
> > +   /* Send a message to the thread spawner to terminate the thread. */
> > +   inst = emit(CS_OPCODE_CS_TERMINATE, reg_undef, payload);
> > +   inst->eot = true;
> > +}
> > +
> >  /**
> >   * Resolve the result of a Gen4-5 CMP instruction to a proper boolean.
> >   *
> > 


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