[Mesa-dev] [PATCH 2/7] i965: Perform basic optimizations on the BROADCAST opcode.

Matt Turner mattst88 at gmail.com
Wed Apr 29 22:30:16 PDT 2015


On Fri, Feb 20, 2015 at 11:48 AM, Francisco Jerez <currojerez at riseup.net> wrote:
> ---
>  src/mesa/drivers/dri/i965/brw_fs.cpp                    | 15 +++++++++++++++
>  src/mesa/drivers/dri/i965/brw_fs_copy_propagation.cpp   |  1 +
>  src/mesa/drivers/dri/i965/brw_fs_cse.cpp                |  1 +
>  src/mesa/drivers/dri/i965/brw_ir_fs.h                   |  7 +++++++
>  src/mesa/drivers/dri/i965/brw_ir_vec4.h                 |  7 +++++++
>  src/mesa/drivers/dri/i965/brw_vec4.cpp                  | 10 ++++++++++
>  src/mesa/drivers/dri/i965/brw_vec4_copy_propagation.cpp |  1 +
>  src/mesa/drivers/dri/i965/brw_vec4_cse.cpp              |  1 +
>  8 files changed, 43 insertions(+)
>
> diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp b/src/mesa/drivers/dri/i965/brw_fs.cpp
> index a2a5234..d567c2b 100644
> --- a/src/mesa/drivers/dri/i965/brw_fs.cpp
> +++ b/src/mesa/drivers/dri/i965/brw_fs.cpp
> @@ -2484,6 +2484,21 @@ fs_visitor::opt_algebraic()
>           }
>           break;
>        }
> +      case SHADER_OPCODE_BROADCAST:
> +         if (is_uniform(inst->src[0])) {
> +            inst->opcode = BRW_OPCODE_MOV;
> +            inst->sources = 1;
> +            progress = true;
> +

Extra newline.

> +         } else if (inst->src[1].file == IMM) {
> +            inst->opcode = BRW_OPCODE_MOV;
> +            inst->src[0] = component(inst->src[0],
> +                                     inst->src[1].fixed_hw_reg.dw1.ud);
> +            inst->sources = 1;
> +            progress = true;
> +         }
> +         break;
> +
>        default:
>          break;
>        }
> diff --git a/src/mesa/drivers/dri/i965/brw_fs_copy_propagation.cpp b/src/mesa/drivers/dri/i965/brw_fs_copy_propagation.cpp
> index e265ce0..cc4d9d0 100644
> --- a/src/mesa/drivers/dri/i965/brw_fs_copy_propagation.cpp
> +++ b/src/mesa/drivers/dri/i965/brw_fs_copy_propagation.cpp
> @@ -572,6 +572,7 @@ fs_visitor::try_constant_propagate(fs_inst *inst, acp_entry *entry)
>           break;
>
>        case FS_OPCODE_UNIFORM_PULL_CONSTANT_LOAD:
> +      case SHADER_OPCODE_BROADCAST:
>           inst->src[i] = val;
>           progress = true;
>           break;
> diff --git a/src/mesa/drivers/dri/i965/brw_fs_cse.cpp b/src/mesa/drivers/dri/i965/brw_fs_cse.cpp
> index ae069bb..bbe0747 100644
> --- a/src/mesa/drivers/dri/i965/brw_fs_cse.cpp
> +++ b/src/mesa/drivers/dri/i965/brw_fs_cse.cpp
> @@ -89,6 +89,7 @@ is_expression(const fs_inst *const inst)
>     case FS_OPCODE_VARYING_PULL_CONSTANT_LOAD:
>     case FS_OPCODE_CINTERP:
>     case FS_OPCODE_LINTERP:
> +   case SHADER_OPCODE_BROADCAST:
>        return true;
>     case SHADER_OPCODE_RCP:
>     case SHADER_OPCODE_RSQ:
> diff --git a/src/mesa/drivers/dri/i965/brw_ir_fs.h b/src/mesa/drivers/dri/i965/brw_ir_fs.h
> index 9ef1261..dc1e041 100644
> --- a/src/mesa/drivers/dri/i965/brw_ir_fs.h
> +++ b/src/mesa/drivers/dri/i965/brw_ir_fs.h
> @@ -166,6 +166,13 @@ component(fs_reg reg, unsigned idx)
>     return reg;
>  }
>
> +static inline bool
> +is_uniform(const fs_reg &reg)
> +{
> +   return (reg.width == 1 || reg.stride == 0 || reg.is_null()) &&
> +      (!reg.reladdr || is_uniform(*reg.reladdr));

Align with previous line.

> +}
> +
>  /**
>   * Get either of the 8-component halves of a 16-component register.
>   *
> diff --git a/src/mesa/drivers/dri/i965/brw_ir_vec4.h b/src/mesa/drivers/dri/i965/brw_ir_vec4.h
> index 941086f..066240e 100644
> --- a/src/mesa/drivers/dri/i965/brw_ir_vec4.h
> +++ b/src/mesa/drivers/dri/i965/brw_ir_vec4.h
> @@ -102,6 +102,13 @@ negate(src_reg reg)
>     return reg;
>  }
>
> +static inline bool
> +is_uniform(const src_reg &reg)
> +{
> +   return (reg.file == IMM || reg.file == UNIFORM || reg.is_null()) &&
> +      (!reg.reladdr || is_uniform(*reg.reladdr));

Align with previous line.

> +}
> +
>  class dst_reg : public backend_reg
>  {
>  public:
> diff --git a/src/mesa/drivers/dri/i965/brw_vec4.cpp b/src/mesa/drivers/dri/i965/brw_vec4.cpp
> index 0a68413..601b8c1 100644
> --- a/src/mesa/drivers/dri/i965/brw_vec4.cpp
> +++ b/src/mesa/drivers/dri/i965/brw_vec4.cpp
> @@ -756,6 +756,16 @@ vec4_visitor::opt_algebraic()
>           }
>           break;
>        }
> +      case SHADER_OPCODE_BROADCAST:
> +         if (is_uniform(inst->src[0]) ||
> +             (inst->src[1].file == IMM &&
> +              inst->src[1].fixed_hw_reg.dw1.ud == 0)) {

is_zero()


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