[Mesa-dev] [PATCH v3 09/78] i965/nir: Pass a is_scalar boolean to brw_create_nir()

[Jason Ekstrand]

This looks better. Sorry I didn't catch the scalar vs problems before.
R-B
On Aug 1, 2015 5:16 AM, "Eduardo Lima Mitev" <elima at igalia.com> wrote:

> The upcoming introduction of NIR->vec4 pass will require that some NIR
> lowering
> passes are enabled/disabled depending on the type of shader (scalar vs.
> vector).
>
> With this patch we pass a 'is_scalar' variable to the process of
> constructing the
> NIR, to let an external context decide how the shader should be handled.
> ---
>  src/mesa/drivers/dri/i965/brw_nir.c      | 3 ++-
>  src/mesa/drivers/dri/i965/brw_nir.h      | 3 ++-
>  src/mesa/drivers/dri/i965/brw_program.c  | 5 +++--
>  src/mesa/drivers/dri/i965/brw_shader.cpp | 6 ++++--
>  src/mesa/drivers/dri/i965/brw_vec4.cpp   | 2 +-
>  5 files changed, 12 insertions(+), 7 deletions(-)
>
> diff --git a/src/mesa/drivers/dri/i965/brw_nir.c
> b/src/mesa/drivers/dri/i965/brw_nir.c
> index 3e154c1..4aa893a 100644
> --- a/src/mesa/drivers/dri/i965/brw_nir.c
> +++ b/src/mesa/drivers/dri/i965/brw_nir.c
> @@ -61,7 +61,8 @@ nir_shader *
>  brw_create_nir(struct brw_context *brw,
>                 const struct gl_shader_program *shader_prog,
>                 const struct gl_program *prog,
> -               gl_shader_stage stage)
> +               gl_shader_stage stage,
> +               bool is_scalar)
>  {
>     struct gl_context *ctx = &brw->ctx;
>     const nir_shader_compiler_options *options =
> diff --git a/src/mesa/drivers/dri/i965/brw_nir.h
> b/src/mesa/drivers/dri/i965/brw_nir.h
> index 3131109..c76defd 100644
> --- a/src/mesa/drivers/dri/i965/brw_nir.h
> +++ b/src/mesa/drivers/dri/i965/brw_nir.h
> @@ -77,7 +77,8 @@ void brw_nir_analyze_boolean_resolves(nir_shader *nir);
>  nir_shader *brw_create_nir(struct brw_context *brw,
>                             const struct gl_shader_program *shader_prog,
>                             const struct gl_program *prog,
> -                           gl_shader_stage stage);
> +                           gl_shader_stage stage,
> +                           bool is_scalar);
>
>  #ifdef __cplusplus
>  }
> diff --git a/src/mesa/drivers/dri/i965/brw_program.c
> b/src/mesa/drivers/dri/i965/brw_program.c
> index 85e271d..467a893 100644
> --- a/src/mesa/drivers/dri/i965/brw_program.c
> +++ b/src/mesa/drivers/dri/i965/brw_program.c
> @@ -143,7 +143,7 @@ brwProgramStringNotify(struct gl_context *ctx,
>        brw_add_texrect_params(prog);
>
>        if
> (ctx->Const.ShaderCompilerOptions[MESA_SHADER_FRAGMENT].NirOptions) {
> -         prog->nir = brw_create_nir(brw, NULL, prog,
> MESA_SHADER_FRAGMENT);
> +         prog->nir = brw_create_nir(brw, NULL, prog,
> MESA_SHADER_FRAGMENT, true);
>        }
>
>        brw_fs_precompile(ctx, NULL, prog);
> @@ -169,7 +169,8 @@ brwProgramStringNotify(struct gl_context *ctx,
>        brw_add_texrect_params(prog);
>
>        if
> (ctx->Const.ShaderCompilerOptions[MESA_SHADER_VERTEX].NirOptions) {
> -         prog->nir = brw_create_nir(brw, NULL, prog, MESA_SHADER_VERTEX);
> +         prog->nir = brw_create_nir(brw, NULL, prog, MESA_SHADER_VERTEX,
> +
> brw->intelScreen->compiler->scalar_vs);
>        }
>
>        brw_vs_precompile(ctx, NULL, prog);
> diff --git a/src/mesa/drivers/dri/i965/brw_shader.cpp
> b/src/mesa/drivers/dri/i965/brw_shader.cpp
> index 524798c..7c5095d 100644
> --- a/src/mesa/drivers/dri/i965/brw_shader.cpp
> +++ b/src/mesa/drivers/dri/i965/brw_shader.cpp
> @@ -398,8 +398,10 @@ brw_link_shader(struct gl_context *ctx, struct
> gl_shader_program *shProg)
>
>        brw_add_texrect_params(prog);
>
> -      if (options->NirOptions)
> -         prog->nir = brw_create_nir(brw, shProg, prog, (gl_shader_stage)
> stage);
> +      if (options->NirOptions) {
> +         prog->nir = brw_create_nir(brw, shProg, prog, (gl_shader_stage)
> stage,
> +                                    is_scalar_shader_stage(brw, stage));
> +      }
>
>        _mesa_reference_program(ctx, &prog, NULL);
>     }
> diff --git a/src/mesa/drivers/dri/i965/brw_vec4.cpp
> b/src/mesa/drivers/dri/i965/brw_vec4.cpp
> index ce04f1b..4e55185 100644
> --- a/src/mesa/drivers/dri/i965/brw_vec4.cpp
> +++ b/src/mesa/drivers/dri/i965/brw_vec4.cpp
> @@ -1919,7 +1919,7 @@ brw_vs_emit(struct brw_context *brw,
>            */
>           assert(vp->Base.Id == 0 && prog == NULL);
>           vp->Base.nir =
> -            brw_create_nir(brw, NULL, &vp->Base, MESA_SHADER_VERTEX);
> +            brw_create_nir(brw, NULL, &vp->Base, MESA_SHADER_VERTEX,
> true);
>        }
>
>        prog_data->base.dispatch_mode = DISPATCH_MODE_SIMD8;
> --
> 2.4.6
>
>
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