[Mesa-dev] [PATCH 5/5] i965/vec4_nir: Properly handle integer multiplies on BDW+

[Kenneth Graunke]

On Monday, August 03, 2015 05:22:14 PM Jason Ekstrand wrote:
> ---
>  src/mesa/drivers/dri/i965/brw_vec4_nir.cpp | 52 ++++++++++++++++--------------
>  1 file changed, 28 insertions(+), 24 deletions(-)
> 
> diff --git a/src/mesa/drivers/dri/i965/brw_vec4_nir.cpp b/src/mesa/drivers/dri/i965/brw_vec4_nir.cpp
> index 1b7fb5e..7251ca0 100644
> --- a/src/mesa/drivers/dri/i965/brw_vec4_nir.cpp
> +++ b/src/mesa/drivers/dri/i965/brw_vec4_nir.cpp
> @@ -775,31 +775,35 @@ vec4_visitor::nir_emit_alu(nir_alu_instr *instr)
>        break;
>  
>     case nir_op_imul: {
> -      nir_const_value *value0 = nir_src_as_const_value(instr->src[0].src);
> -      nir_const_value *value1 = nir_src_as_const_value(instr->src[1].src);
> -
> -      /* For integer multiplication, the MUL uses the low 16 bits of one of
> -       * the operands (src0 through SNB, src1 on IVB and later). The MACH
> -       * accumulates in the contribution of the upper 16 bits of that
> -       * operand. If we can determine that one of the args is in the low
> -       * 16 bits, though, we can just emit a single MUL.
> -       */
> -      if (value0 && value0->u[0] < (1 << 16)) {
> -         if (devinfo->gen < 7)
> -            emit(MUL(dst, op[0], op[1]));
> -         else
> -            emit(MUL(dst, op[1], op[0]));
> -      } else if (value1 && value1->u[0] < (1 << 16)) {
> -         if (devinfo->gen < 7)
> -            emit(MUL(dst, op[1], op[0]));
> -         else
> -            emit(MUL(dst, op[0], op[1]));
> -      } else {
> -         struct brw_reg acc = retype(brw_acc_reg(8), dst.type);
> +      if (devinfo->gen < 8) {
> +         nir_const_value *value0 = nir_src_as_const_value(instr->src[0].src);
> +         nir_const_value *value1 = nir_src_as_const_value(instr->src[1].src);
> +
> +         /* For integer multiplication, the MUL uses the low 16 bits of one of
> +          * the operands (src0 through SNB, src1 on IVB and later). The MACH
> +          * accumulates in the contribution of the upper 16 bits of that
> +          * operand. If we can determine that one of the args is in the low
> +          * 16 bits, though, we can just emit a single MUL.
> +          */
> +         if (value0 && value0->u[0] < (1 << 16)) {
> +            if (devinfo->gen < 7)
> +               emit(MUL(dst, op[0], op[1]));
> +            else
> +               emit(MUL(dst, op[1], op[0]));
> +         } else if (value1 && value1->u[0] < (1 << 16)) {
> +            if (devinfo->gen < 7)
> +               emit(MUL(dst, op[1], op[0]));
> +            else
> +               emit(MUL(dst, op[0], op[1]));
> +         } else {
> +            struct brw_reg acc = retype(brw_acc_reg(8), dst.type);
>  
> -         emit(MUL(acc, op[0], op[1]));
> -         emit(MACH(dst_null_d(), op[0], op[1]));
> -         emit(MOV(dst, src_reg(acc)));
> +            emit(MUL(acc, op[0], op[1]));
> +            emit(MACH(dst_null_d(), op[0], op[1]));
> +            emit(MOV(dst, src_reg(acc)));
> +         }
> +      } else {
> +	 emit(MUL(dst, op[0], op[1]));

Cherryview can't do D * D or UD * UD multiplication; you need MACH.
I doubt this will work there...

--Ken

>        }
>        break;
>     }
> 
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