[Mesa-dev] [PATCH v4 (part2) 15/59] i965/vec4: Implement unsized array's length calculation
jordan.l.justen at intel.com
Thu Aug 27 23:48:19 PDT 2015
On 2015-08-27 23:07:26, Samuel Iglesias Gonsálvez wrote:
> On 28/08/15 08:06, Samuel Iglesias Gonsálvez wrote:
> > On 28/08/15 02:21, Jordan Justen wrote:
> >> On 2015-08-05 01:30:12, Iago Toral Quiroga wrote:
> >>> From: Samuel Iglesias Gonsalvez <siglesias at igalia.com>
> >>> Notice that Skylake needs to include a header in the sampler message
> >>> so it will need some tweaks to work there.
> >>> Signed-off-by: Samuel Iglesias Gonsalvez <siglesias at igalia.com>
> >>> ---
> >>> src/mesa/drivers/dri/i965/brw_defines.h | 3 ++
> >>> src/mesa/drivers/dri/i965/brw_shader.cpp | 3 ++
> >>> src/mesa/drivers/dri/i965/brw_vec4.cpp | 1 +
> >>> src/mesa/drivers/dri/i965/brw_vec4.h | 6 ++++
> >>> src/mesa/drivers/dri/i965/brw_vec4_generator.cpp | 31 ++++++++++++++++
> >>> src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp | 46 ++++++++++++++++++++++--
> >> Shouldn't this be in brw_vec4_nir.cpp instead?
> > I wrote this patch before vec4 NIR backend was upstreamed. I have a
> > separate patch that adds a similar code to vec4 nir backend.
Did this make it into v4?
> > Or do you suggest to delete this patch?
> I mean: delete brw_vec4_visitor.cpp changes from this patch and add
> brw_vec4_nir.cpp changes to it.
I think the nir path is the priority. I skimmed the series a bit and
it didn't seem like this array length part was enabled on the nir
I don't think there's a need to enable the non-nir path. But, if you
somehow find it useful for debugging, then you can leave the non-nir
I think that going forward we should only implement new features on
the nir path, and I assume sometime before the next release branch
we'll delete the non-nir vec4 path. (That's how it happened with the
scalar side anyway.)
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