[Mesa-dev] [PATCH 1/3] winsys/amdgpu: addrlib - port fix error for workaround for 1D tiling

[Marek Olšák]

From: Sonny Jiang <sonny.jiang at amd.com>

Change-Id: I1383d2b2670ed02bc6a6761531ee20f27fd6492f
Signed-off-by: Sonny Jiang <sonny.jiang at amd.com>

Reviewed-by: Alex Deucher <alexander.deucher at amd.com>
---
 src/gallium/winsys/amdgpu/drm/addrlib/r800/egbaddrlib.cpp | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/gallium/winsys/amdgpu/drm/addrlib/r800/egbaddrlib.cpp b/src/gallium/winsys/amdgpu/drm/addrlib/r800/egbaddrlib.cpp
index b1e008b..110e3d0 100644
--- a/src/gallium/winsys/amdgpu/drm/addrlib/r800/egbaddrlib.cpp
+++ b/src/gallium/winsys/amdgpu/drm/addrlib/r800/egbaddrlib.cpp
@@ -672,7 +672,7 @@ BOOL_32 EgBasedAddrLib::ComputeSurfaceAlignmentsMicroTiled(
     if (flags.czDispCompatible)
     {
         *pBaseAlign  = PowTwoAlign(*pBaseAlign, 4096);                         //Base address MOD 4096 = 0
-        *pPitchAlign = PowTwoAlign(*pPitchAlign, 512 >> (BITS_TO_BYTES(bpp))); //(8 lines * pitch * bytes per pixel) MOD 4096 = 0
+        *pPitchAlign = PowTwoAlign(*pPitchAlign, 512 / (BITS_TO_BYTES(bpp))); //(8 lines * pitch * bytes per pixel) MOD 4096 = 0
     }
     // end Carrizo workaround for 1D tilling
 
-- 
2.1.4