[Mesa-dev] [PATCH 08/10] i965: Refactor effective depth calculation

Topi Pohjolainen topi.pohjolainen at intel.com
Wed Jul 1 04:46:38 PDT 2015


v2: Non-trivial rebase

Reviewed-by: Matt Turner <mattst88 at gmail.com> (v1)
Reviewed-by: Kenneth Graunke <kenneth at whitecape.org> (v1)
Signed-off-by: Topi Pohjolainen <topi.pohjolainen at intel.com>
---
 src/mesa/drivers/dri/i965/brw_context.h           | 1 +
 src/mesa/drivers/dri/i965/brw_wm_surface_state.c  | 9 ++++++++-
 src/mesa/drivers/dri/i965/gen7_wm_surface_state.c | 7 +------
 src/mesa/drivers/dri/i965/gen8_surface_state.c    | 7 +------
 4 files changed, 11 insertions(+), 13 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/brw_context.h b/src/mesa/drivers/dri/i965/brw_context.h
index 061600f..4156cfb 100644
--- a/src/mesa/drivers/dri/i965/brw_context.h
+++ b/src/mesa/drivers/dri/i965/brw_context.h
@@ -984,6 +984,7 @@ struct brw_context
                                      const struct intel_mipmap_tree *mt,
                                      struct gl_texture_object *tex_obj,
                                      uint32_t tex_format, int swizzle,
+                                     uint32_t depth,
                                      uint32_t *surf_offset,
                                      bool for_gather);
       uint32_t (*update_renderbuffer_surface)(struct brw_context *brw,
diff --git a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
index 4afdc23..f2e6e44 100644
--- a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
+++ b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
@@ -311,6 +311,7 @@ brw_update_texture_surface(struct gl_context *ctx,
                            const struct intel_mipmap_tree *mt,
                            struct gl_texture_object *tObj,
                            uint32_t tex_format, int swizzle /* unused */,
+                           uint32_t depth /* unused */,
                            uint32_t *surf_offset,
                            bool for_gather)
 {
@@ -852,8 +853,14 @@ update_stage_texture_surfaces(struct brw_context *brw,
       const unsigned swizzle = unlikely(alpha_depth) ?
          SWIZZLE_XYZW : brw_get_texture_swizzle(ctx, tex);
 
+      /* If this is a view with restricted NumLayers, then our effective depth
+       * is not just the miptree depth.
+       */
+      const unsigned depth = tex->Immutable && tex->Target != GL_TEXTURE_3D ?
+                             tex->NumLayers : mt->logical_depth0;
+
       /* _NEW_TEXTURE */
-      brw->vtbl.update_texture_surface(ctx, mt, tex, format, swizzle,
+      brw->vtbl.update_texture_surface(ctx, mt, tex, format, swizzle, depth,
                                        surf_offset + s, for_gather);
    }
 }
diff --git a/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c b/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c
index 0de43a4..bbc726e 100644
--- a/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c
+++ b/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c
@@ -351,7 +351,7 @@ static void
 gen7_update_texture_surface(struct gl_context *ctx,
                             const struct intel_mipmap_tree *mt,
                             struct gl_texture_object *obj,
-                            uint32_t format, int swizzle,
+                            uint32_t format, int swizzle, uint32_t depth,
                             uint32_t *surf_offset,
                             bool for_gather)
 {
@@ -362,11 +362,6 @@ gen7_update_texture_surface(struct gl_context *ctx,
 
    } else {
       struct intel_texture_object *intel_obj = intel_texture_object(obj);
-      /* If this is a view with restricted NumLayers, then our effective depth
-       * is not just the miptree depth.
-       */
-      const unsigned depth = (obj->Immutable && obj->Target != GL_TEXTURE_3D ?
-                              obj->NumLayers : mt->logical_depth0);
 
       if (for_gather && format == BRW_SURFACEFORMAT_R32G32_FLOAT)
          format = BRW_SURFACEFORMAT_R32G32_FLOAT_LD;
diff --git a/src/mesa/drivers/dri/i965/gen8_surface_state.c b/src/mesa/drivers/dri/i965/gen8_surface_state.c
index c4eed08..1e4ac22 100644
--- a/src/mesa/drivers/dri/i965/gen8_surface_state.c
+++ b/src/mesa/drivers/dri/i965/gen8_surface_state.c
@@ -302,7 +302,7 @@ static void
 gen8_update_texture_surface(struct gl_context *ctx,
                             const struct intel_mipmap_tree *mt,
                             struct gl_texture_object *obj,
-                            uint32_t format, int swizzle,
+                            uint32_t format, int swizzle, uint32_t depth,
                             uint32_t *surf_offset,
                             bool for_gather)
 {
@@ -313,11 +313,6 @@ gen8_update_texture_surface(struct gl_context *ctx,
 
    } else {
       struct intel_texture_object *intel_obj = intel_texture_object(obj);
-      /* If this is a view with restricted NumLayers, then our effective depth
-       * is not just the miptree depth.
-       */
-      const unsigned depth = (obj->Immutable && obj->Target != GL_TEXTURE_3D ?
-                              obj->NumLayers : mt->logical_depth0);
 
       gen8_emit_texture_surface_state(brw, mt, obj->Target,
                                       obj->MinLayer, obj->MinLayer + depth,
-- 
1.9.3



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