[Mesa-dev] [PATCH v2 41/82] i965/fs/nir: implement unsized array's length calculation

Iago Toral Quiroga itoral at igalia.com
Wed Jun 3 00:01:31 PDT 2015


From: Samuel Iglesias Gonsalvez <siglesias at igalia.com>

Signed-off-by: Samuel Iglesias Gonsalvez <siglesias at igalia.com>
---
 src/mesa/drivers/dri/i965/brw_fs_nir.cpp | 51 ++++++++++++++++++++++++++++++++
 1 file changed, 51 insertions(+)

diff --git a/src/mesa/drivers/dri/i965/brw_fs_nir.cpp b/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
index 3bd477d..0cc6a4f 100644
--- a/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
@@ -1575,6 +1575,57 @@ fs_visitor::nir_emit_intrinsic(nir_intrinsic_instr *instr)
       break;
    }
 
+   case nir_intrinsic_ssbo_unsized_array_length: {
+      nir_const_value *const_uniform_block = nir_src_as_const_value(instr->src[0]);
+      unsigned ubo_index = const_uniform_block ? const_uniform_block->u[0] : 0;
+      nir_const_value *const_offset_ir = nir_src_as_const_value(instr->src[1]);
+      int const_offset = const_offset_ir ? const_offset_ir->u[0] : 0;
+      nir_const_value *const_stride_ir = nir_src_as_const_value(instr->src[2]);
+      unsigned unsized_array_stride = const_stride_ir ? const_stride_ir->u[0] : 1;
+      int reg_width = dispatch_width / 8;
+
+      assert(shader->base.UniformBlocks[ubo_index].IsShaderStorage);
+
+      /* Set LOD = 0 */
+      fs_reg source = fs_reg(0);
+
+      int mlen = 1 * reg_width;
+      fs_reg src_payload = fs_reg(GRF, alloc.allocate(mlen),
+                                   BRW_REGISTER_TYPE_UD, dispatch_width);
+      emit(LOAD_PAYLOAD(src_payload, &source, 1, 0));
+
+      fs_reg surf_index = fs_reg(prog_data->binding_table.ubo_start + ubo_index);
+      fs_reg buffer_size = vgrf(glsl_type::int_type);
+
+      fs_inst *inst = emit(FS_OPCODE_UNSIZED_ARRAY_LENGTH, buffer_size,
+                           src_payload, surf_index);
+      inst->header_size = 0;
+      inst->base_mrf = -1;
+      inst->mlen = mlen;
+      inst->regs_written = 4 * reg_width;
+      emit(inst);
+
+      /* array.length() =
+          max((buffer_object_size - offset_of_array) / stride_of_array, 0) */
+      fs_reg temp = vgrf(glsl_type::float_type);
+      emit(ADD(buffer_size, buffer_size, fs_reg(-const_offset)));
+
+      emit(MOV(temp, buffer_size));
+
+      assert(unsized_array_stride > 0);
+
+      fs_reg stride = fs_reg((float)1/unsized_array_stride);
+      emit(MUL(temp, temp, stride));
+      emit(MOV(dest, fs_reg(0)));
+      emit(CMP(reg_null_f, temp, fs_reg(0), BRW_CONDITIONAL_G));
+      emit(IF(BRW_PREDICATE_NORMAL));
+      {
+         emit(MOV(retype(dest, BRW_REGISTER_TYPE_D), temp));
+      }
+      emit(BRW_OPCODE_ENDIF);
+      break;
+   }
+
    default:
       unreachable("unknown intrinsic");
    }
-- 
1.9.1



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