[Mesa-dev] [PATCH] squash! i965: Consolidate certain miptree params to flags

[Ben Widawsky]

Here is the diff compared to v1, with the r-b tags I got. I've only compile
tested this, but I'll send it through jenkins before push.

Thanks for the comments.

Cc: "Pohjolainen, Topi" <topi.pohjolainen at intel.com>
Reviewed-by: Chad Versace <chad.versace at intel.com>
Reviewed-by: Anuj Phogat <anuj.phogat at gmail.com>
Reviewed-by: Jordan Justen <jordan.l.justen at intel.com>
---
 src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 22 +++++++++++-----------
 src/mesa/drivers/dri/i965/intel_mipmap_tree.h | 11 +++++++----
 2 files changed, 18 insertions(+), 15 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
index b243f8a..cdd9740 100644
--- a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
+++ b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
@@ -284,7 +284,7 @@ intel_miptree_create_layout(struct brw_context *brw,
    mt->logical_height0 = height0;
    mt->logical_depth0 = depth0;
    mt->fast_clear_state = INTEL_FAST_CLEAR_STATE_NO_MCS;
-   mt->disable_aux_buffers = !!(layout_flags & MIPTREE_LAYOUT_DISABLE_AUX);
+   mt->disable_aux_buffers = (layout_flags & MIPTREE_LAYOUT_DISABLE_AUX) != 0;
    exec_list_make_empty(&mt->hiz_map);
 
    /* The cpp is bytes per (1, blockheight)-sized block for compressed
@@ -428,6 +428,7 @@ intel_miptree_create_layout(struct brw_context *brw,
       uint32_t stencil_flags = MIPTREE_LAYOUT_ACCELERATED_UPLOAD;
       if (brw->gen == 6)
          stencil_flags |= MIPTREE_LAYOUT_FORCE_ALL_SLICE_AT_LOD;
+
       mt->stencil_mt = intel_miptree_create(brw,
                                             mt->target,
                                             MESA_FORMAT_S_UINT8,
@@ -630,6 +631,7 @@ intel_miptree_create(struct brw_context *brw,
    mesa_format tex_format = format;
    mesa_format etc_format = MESA_FORMAT_NONE;
    GLuint total_width, total_height;
+   uint32_t alloc_flags = 0;
 
    format = intel_lower_compressed_format(brw, format);
 
@@ -670,13 +672,14 @@ intel_miptree_create(struct brw_context *brw,
       mt->tiling = tiling;
    }
 
+   if (layout_flags & MIPTREE_LAYOUT_ACCELERATED_UPLOAD)
+      alloc_flags |= BO_ALLOC_FOR_RENDER;
+
    unsigned long pitch;
+   mt->bo = drm_intel_bo_alloc_tiled(brw->bufmgr, "miptree", total_width,
+                                     total_height, mt->cpp, &mt->tiling,
+                                     &pitch, alloc_flags);
    mt->etc_format = etc_format;
-   mt->bo =
-      drm_intel_bo_alloc_tiled(brw->bufmgr, "miptree", total_width, total_height,
-                               mt->cpp, &mt->tiling, &pitch,
-                               (layout_flags & MIPTREE_LAYOUT_ACCELERATED_UPLOAD) ?
-                               BO_ALLOC_FOR_RENDER : 0);
    mt->pitch = pitch;
 
    /* If the BO is too large to fit in the aperture, we need to use the
@@ -689,12 +692,9 @@ intel_miptree_create(struct brw_context *brw,
 
       mt->tiling = I915_TILING_X;
       drm_intel_bo_unreference(mt->bo);
-      mt->bo =
-         drm_intel_bo_alloc_tiled(brw->bufmgr, "miptree",
+      mt->bo = drm_intel_bo_alloc_tiled(brw->bufmgr, "miptree",
                                   total_width, total_height, mt->cpp,
-                                  &mt->tiling, &pitch,
-                                  (layout_flags & MIPTREE_LAYOUT_ACCELERATED_UPLOAD) ?
-                                  BO_ALLOC_FOR_RENDER : 0);
+                                  &mt->tiling, &pitch, alloc_flags);
       mt->pitch = pitch;
    }
 
diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.h b/src/mesa/drivers/dri/i965/intel_mipmap_tree.h
index 4722353..06bc7e8 100644
--- a/src/mesa/drivers/dri/i965/intel_mipmap_tree.h
+++ b/src/mesa/drivers/dri/i965/intel_mipmap_tree.h
@@ -527,10 +527,13 @@ bool
 intel_miptree_alloc_non_msrt_mcs(struct brw_context *brw,
                                  struct intel_mipmap_tree *mt);
 
-#define MIPTREE_LAYOUT_ACCELERATED_UPLOAD       (1<<0)
-#define MIPTREE_LAYOUT_FORCE_ALL_SLICE_AT_LOD   (1<<1)
-#define MIPTREE_LAYOUT_FOR_BO                   (1<<2)
-#define MIPTREE_LAYOUT_DISABLE_AUX              (1<<3)
+enum {
+   MIPTREE_LAYOUT_ACCELERATED_UPLOAD       = 1 << 0,
+   MIPTREE_LAYOUT_FORCE_ALL_SLICE_AT_LOD   = 1 << 1,
+   MIPTREE_LAYOUT_FOR_BO                   = 1 << 2,
+   MIPTREE_LAYOUT_DISABLE_AUX              = 1 << 3,
+};
+
 struct intel_mipmap_tree *intel_miptree_create(struct brw_context *brw,
                                                GLenum target,
 					       mesa_format format,
-- 
2.4.2