[Mesa-dev] [PATCH 21/38] i965/fs: Migrate shader time to the IR builder.

Matt Turner mattst88 at gmail.com
Thu Jun 4 15:34:05 PDT 2015


On Thu, Jun 4, 2015 at 9:05 AM, Francisco Jerez <currojerez at riseup.net> wrote:
> ---
>  src/mesa/drivers/dri/i965/brw_fs.cpp | 54 +++++++++++++-----------------------
>  src/mesa/drivers/dri/i965/brw_fs.h   |  5 ++--
>  2 files changed, 23 insertions(+), 36 deletions(-)
>
> diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp b/src/mesa/drivers/dri/i965/brw_fs.cpp
> index 4e8d6ae..bd94dc4 100644
> --- a/src/mesa/drivers/dri/i965/brw_fs.cpp
> +++ b/src/mesa/drivers/dri/i965/brw_fs.cpp
> @@ -673,7 +673,7 @@ fs_visitor::type_size(const struct glsl_type *type)
>   * the destination of the MOV, with extra parameters set.
>   */
>  fs_reg
> -fs_visitor::get_timestamp(fs_inst **out_mov)
> +fs_visitor::get_timestamp(const fs_builder &bld)
>  {
>     assert(devinfo->gen >= 7);
>
> @@ -684,11 +684,10 @@ fs_visitor::get_timestamp(fs_inst **out_mov)
>
>     fs_reg dst = fs_reg(GRF, alloc.allocate(1), BRW_REGISTER_TYPE_UD, 4);
>
> -   fs_inst *mov = MOV(dst, ts);
>     /* We want to read the 3 fields we care about even if it's not enabled in
>      * the dispatch.
>      */
> -   mov->force_writemask_all = true;
> +   bld.exec_all().MOV(dst, ts);
>
>     /* The caller wants the low 32 bits of the timestamp.  Since it's running
>      * at the GPU clock rate of ~1.2ghz, it will roll over every ~3 seconds,
> @@ -702,24 +701,18 @@ fs_visitor::get_timestamp(fs_inst **out_mov)
>      */
>     dst.set_smear(0);
>
> -   *out_mov = mov;
>     return dst;
>  }
>
>  void
>  fs_visitor::emit_shader_time_begin()
>  {
> -   current_annotation = "shader time start";
> -   fs_inst *mov;
> -   shader_start_time = get_timestamp(&mov);
> -   emit(mov);
> +   shader_start_time = get_timestamp(bld.annotate("shader time start"));
>  }
>
>  void
>  fs_visitor::emit_shader_time_end()
>  {
> -   current_annotation = "shader time end";
> -
>     enum shader_time_shader_type type, written_type, reset_type;
>     switch (stage) {
>     case MESA_SHADER_VERTEX:
> @@ -756,47 +749,41 @@ fs_visitor::emit_shader_time_end()
>     /* Insert our code just before the final SEND with EOT. */
>     exec_node *end = this->instructions.get_tail();
>     assert(end && ((fs_inst *) end)->eot);
> +   const fs_builder ibld = bld.annotate("shader time end")
> +                              .exec_all().at(NULL, end);
>
> -   fs_inst *tm_read;
> -   fs_reg shader_end_time = get_timestamp(&tm_read);
> -   end->insert_before(tm_read);
> +   fs_reg shader_end_time = get_timestamp(ibld);
>
>     /* Check that there weren't any timestamp reset events (assuming these
>      * were the only two timestamp reads that happened).
>      */
>     fs_reg reset = shader_end_time;
>     reset.set_smear(2);
> -   fs_inst *test = AND(reg_null_d, reset, fs_reg(1u));
> -   test->conditional_mod = BRW_CONDITIONAL_Z;
> -   test->force_writemask_all = true;
> -   end->insert_before(test);
> -   end->insert_before(IF(BRW_PREDICATE_NORMAL));
> +   set_condmod(BRW_CONDITIONAL_Z,
> +               ibld.AND(ibld.null_reg_d(), reset, fs_reg(1u)));

While we're here, change this to .null_reg_ud() so it can be compacted.


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