[Mesa-dev] [PATCH] i965: Use vec4 vs shader path in spill cases.

Matt Turner mattst88 at gmail.com
Fri Jun 5 13:12:22 PDT 2015

On Fri, Jun 5, 2015 at 10:29 AM, Bish, Jim <jim.bish at intel.com> wrote:
> On 06/04/2015 04:35 PM, Ben Widawsky wrote:
>> On Wed, Jun 03, 2015 at 05:42:10PM -0700, Matt Turner wrote:
>>> I ran the patch through our Jenkins CI system and while it does fix 26
>>> tests on BDW, it causes an assertion failure in
>>> tests/spec/glsl-1.30/execution/varying-packing-mixed-types.shader_test:
>>> shader_runner: ../../../../../../mesa/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp:1071:
>>> virtual void brw::vec4_visitor::visit(ir_variable*): Assertion
>>> `this->uniforms < uniform_array_size' failed.
> whoops - will run the shader_db tests as well and fix. I only ran piglit
> my bad.

To be clear -- this is a piglit test -- not something in shader-db.

>>> I ran the patch through shader-db, and there were no changes, but
>>> that's because we have no vertex shaders that spill. Until we have
>>> vertex shaders that spill, I don't think figuring out how to fall back
>>> to vec4 and generate reasonable code is particularly compelling.
> what platform?  this code only kicks in on BDW and SKL systems?  did
> you look at the piglit test referenced in teh bug?

Broadwell. I ran shader-db with ./run -p bdw.

Yes, I looked at the piglit test, and while it indeed spills I don't
think we should make decisions about falling back to SIMD4x2 based on
a pathological test case. :)

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