[Mesa-dev] [PATCH 2/2] i965: Add gen8 fast clear perf debug
Kenneth Graunke
kenneth at whitecape.org
Fri Jun 5 13:55:10 PDT 2015
On Friday, June 05, 2015 10:30:34 AM Ben Widawsky wrote:
> In an ideal world I would just implement this instead of adding the perf debug.
> There are some errata involved which lead me to believe it won't be so simple as
> flipping a few bits.
>
> There is room to add a thing for Gen9s flexibility, but since I am actively
> working on that I have opted to ignore it.
>
> Example:
> Multi-LOD fast clear - giving up (256x128x8).
>
> Signed-off-by: Ben Widawsky <ben at bwidawsk.net>
> ---
> src/mesa/drivers/dri/i965/brw_meta_fast_clear.c | 4 ++++
> src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 15 +++++++++++++--
> 2 files changed, 17 insertions(+), 2 deletions(-)
>
> diff --git a/src/mesa/drivers/dri/i965/brw_meta_fast_clear.c b/src/mesa/drivers/dri/i965/brw_meta_fast_clear.c
> index a864143..c0c8dfa 100644
> --- a/src/mesa/drivers/dri/i965/brw_meta_fast_clear.c
> +++ b/src/mesa/drivers/dri/i965/brw_meta_fast_clear.c
> @@ -340,6 +340,10 @@ is_color_fast_clear_compatible(struct brw_context *brw,
> const union gl_color_union *color)
> {
> if (_mesa_is_format_integer_color(format))
> + if (brw->gen >= 8) {
> + perf_debug("Integer fast clear not enabled for (%s)",
> + _mesa_get_format_name(format));
> + }
> return false;
>
> for (int i = 0; i < 4; i++) {
> diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
> index 24a5c3d..f2f28b1 100644
> --- a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
> +++ b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
> @@ -198,10 +198,21 @@ intel_is_non_msrt_mcs_buffer_supported(struct brw_context *brw,
> return false;
> if (mt->cpp != 4 && mt->cpp != 8 && mt->cpp != 16)
> return false;
> - if (mt->first_level != 0 || mt->last_level != 0)
> + if (mt->first_level != 0 || mt->last_level != 0) {
> + if (brw->gen >= 8)
> + perf_debug("Multi-LOD fast clear - giving up (%dx%dx%d).\n",
> + mt->logical_width0, mt->logical_height0, mt->last_level);
> +
braces around these would be nice, since they span multiple lines.
Both patches are:
Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>
Thanks Ben!
> return false;
> - if (mt->physical_depth0 != 1)
> + }
> + if (mt->physical_depth0 != 1) {
> + if (brw->gen >= 8)
> + perf_debug("Layered fast clear - giving up. (%dx%d%d)\n",
> + mt->logical_width0, mt->logical_height0,
> + mt->physical_depth0);
> +
> return false;
> + }
>
> /* There's no point in using an MCS buffer if the surface isn't in a
> * renderable format.
>
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