[Mesa-dev] [PATCH] i965/gen8: Fix antialiased line rendering with width < 1.5

[Iago Toral Quiroga]

The same fix Marius implemented for gen6 (commit a9b04d8a) and
gen7 (commit 24ecf37a).
---
 src/mesa/drivers/dri/i965/gen8_sf_state.c | 22 ++++++++++++++++++++--
 1 file changed, 20 insertions(+), 2 deletions(-)

Ken, I don't have gen8 hardware available to test this so it would
be nice if someone else verifies that this fixes the piglit tests you
mentioned.

diff --git a/src/mesa/drivers/dri/i965/gen8_sf_state.c b/src/mesa/drivers/dri/i965/gen8_sf_state.c
index 83ef62b..22c1c4a 100644
--- a/src/mesa/drivers/dri/i965/gen8_sf_state.c
+++ b/src/mesa/drivers/dri/i965/gen8_sf_state.c
@@ -156,8 +156,26 @@ upload_sf(struct brw_context *brw)
    /* _NEW_LINE */
    float line_width = brw_get_line_width(brw);
    uint32_t line_width_u3_7 = U_FIXED(line_width, 7);
-   if (line_width_u3_7 == 0)
-      line_width_u3_7 = 1;
+
+   /* Line width of 0 is not allowed when MSAA enabled */
+   if (ctx->Multisample._Enabled) {
+      if (line_width_u3_7 == 0)
+          line_width_u3_7 = 1;
+   } else if (ctx->Line.SmoothFlag && ctx->Line.Width < 1.5) {
+      /* For 1 pixel line thickness or less, the general
+       * anti-aliasing algorithm gives up, and a garbage line is
+       * generated.  Setting a Line Width of 0.0 specifies the
+       * rasterization of the "thinnest" (one-pixel-wide),
+       * non-antialiased lines.
+       *
+       * Lines rendered with zero Line Width are rasterized using
+       * Grid Intersection Quantization rules as specified by
+       * bspec section 6.3.12.1 Zero-Width (Cosmetic) Line
+       * Rasterization.
+       */
+      line_width_u3_7 = 0;
+   }
+
    if (brw->gen >= 9 || brw->is_cherryview) {
       dw1 |= line_width_u3_7 << GEN9_SF_LINE_WIDTH_SHIFT;
    } else {
-- 
1.9.1