[Mesa-dev] [PATCH] i965/skl: Fix aligning mt->total_width to the block size

[Ben Widawsky]

On Tue, Jun 16, 2015 at 01:53:40PM +0100, Neil Roberts wrote:
> brw_miptree_layout_2d tries to ensure that mt->total_width is a
> multiple of the compressed block size, presumably because it wouldn't
> be possible to make an image that has a fraction of a block. However
> it was doing this by aligning mt->total_width to align_w. Previously
> align_w has been used as a shortcut for getting the block width
> because before Gen9 the block width was always equal to the alignment.
> Commit 4ab8d59a2 tried to fix these cases to use the block width
> instead of the alignment but it missed this case.
> 
> I think in practice this probably won't make any difference because
> the buffer for the texture will be allocated to be large enough to
> contain the entire pitch and libdrm aligns the pitch to the tile width
> anyway. However I think the patch is worth having to make the
> intention clearer.

I think this is beginning to infringe upon the definition of align_w. The total
width is a function of it's miptree properties and not the compressed block
properties, right?

In other words, if there is a case where align_w != bw, I think total_width
should be aligned to align_w, NOT bw.

(I'm not opposed to the patch, just making sure I understand.)

> ---
>  src/mesa/drivers/dri/i965/brw_tex_layout.c | 5 ++---
>  1 file changed, 2 insertions(+), 3 deletions(-)
> 
> diff --git a/src/mesa/drivers/dri/i965/brw_tex_layout.c b/src/mesa/drivers/dri/i965/brw_tex_layout.c
> index 1e7d8a1..dbb6cef 100644
> --- a/src/mesa/drivers/dri/i965/brw_tex_layout.c
> +++ b/src/mesa/drivers/dri/i965/brw_tex_layout.c
> @@ -366,9 +366,8 @@ brw_miptree_layout_2d(struct intel_mipmap_tree *mt)
>  
>     mt->total_width = mt->physical_width0;
>  
> -   if (mt->compressed) {
> -       mt->total_width = ALIGN(mt->physical_width0, mt->align_w);
> -   }
> +   if (mt->compressed)
> +       mt->total_width = ALIGN(mt->total_width, bw);
>  
>     /* May need to adjust width to accommodate the placement of
>      * the 2nd mipmap.  This occurs when the alignment
> -- 
> 1.9.3
> 
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