[Mesa-dev] [PATCH 3/4] i965/gen9: Don't use encrypted MOCS

Ben Widawsky benjamin.widawsky at intel.com
Wed Jun 17 15:50:13 PDT 2015

On gen9+ MOCS is an index into a table. It is 7 bits, and AFAICT, bit 0 is for
doing encrypted reads.

I don't recall how I decided to do this for BXT. I don't know this patch was
ever needed, since it seems nothing is broken today on SKL. Furthermore, this
patch may no longer be needed because of the ongoing changes with MOCS setup. It
is what is being used/tested, so it's included in the series.

The chosen values are the old values left shifted. That was also an arbitrary

Cc:  Francisco Jerez <currojerez at riseup.net>
Signed-off-by: Ben Widawsky <ben at bwidawsk.net>
 src/mesa/drivers/dri/i965/brw_defines.h | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/brw_defines.h b/src/mesa/drivers/dri/i965/brw_defines.h
index bfcc442..5358edc 100644
--- a/src/mesa/drivers/dri/i965/brw_defines.h
+++ b/src/mesa/drivers/dri/i965/brw_defines.h
@@ -2495,8 +2495,8 @@ enum brw_wm_barycentric_interp_mode {
  * cache settings.  We still use only either write-back or write-through; and
  * rely on the documented default values.
-#define SKL_MOCS_WB 9
-#define SKL_MOCS_WT 5
+#define SKL_MOCS_WB 0x12
+#define SKL_MOCS_WT 0xa
 #define MEDIA_VFE_STATE                         0x7000
 /* GEN7 DW2, GEN8+ DW3 */

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