[Mesa-dev] [PATCH 1/2] [RFC] i965/vec4: Reward spills in if/else/endif blocks

[Connor Abbott]

I don't think this is doing what you think it's doing. This code is
for calculating the *cost* of spills, so a higher cost means a lower
priority for choosing the register. We increase the cost for things
inside loops because we don't want to spill inside loops, and by doing
the same thing for if's you're actually discouraging spills inside an
if block.

On Fri, Jun 19, 2015 at 5:21 PM, Ben Widawsky
<benjamin.widawsky at intel.com> wrote:
> If we have a register that needs spilling in an if/else block, there is a chance
> that we may not need to spill if we do[n't] take the branch.
>
> The downside of this patch is the case where the register being spilled ends up
> in both if/else blocks. For that case, preferring this path will increase code
> size with no possible performance benefit.
>
> Same patch for FS coming up.
>
> Signed-off-by: Ben Widawsky <ben at bwidawsk.net>
> ---
>  src/mesa/drivers/dri/i965/brw_vec4_reg_allocate.cpp | 2 ++
>  1 file changed, 2 insertions(+)
>
> diff --git a/src/mesa/drivers/dri/i965/brw_vec4_reg_allocate.cpp b/src/mesa/drivers/dri/i965/brw_vec4_reg_allocate.cpp
> index b9db908..b345f27 100644
> --- a/src/mesa/drivers/dri/i965/brw_vec4_reg_allocate.cpp
> +++ b/src/mesa/drivers/dri/i965/brw_vec4_reg_allocate.cpp
> @@ -309,10 +309,12 @@ vec4_visitor::evaluate_spill_costs(float *spill_costs, bool *no_spill)
>
>        switch (inst->opcode) {
>
> +      case BRW_OPCODE_ENDIF:
>        case BRW_OPCODE_DO:
>          loop_scale *= 10;
>          break;
>
> +      case BRW_OPCODE_IF:
>        case BRW_OPCODE_WHILE:
>          loop_scale /= 10;
>          break;
> --
> 2.4.4
>
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