[Mesa-dev] [PATCH v3 13/18] i965: use ALIGN_NPOT for setting ASTC mipmap layouts

Nanley Chery nanleychery at gmail.com
Mon Jun 22 16:02:19 PDT 2015


From: Nanley Chery <nanley.g.chery at intel.com>

ALIGN is changed to ALIGN_NPOT because alignment values are sometimes not
powers of two when working with ASTC.

Signed-off-by: Nanley Chery <nanley.g.chery at intel.com>
---
 src/mesa/drivers/dri/i965/brw_tex_layout.c    | 12 ++++++------
 src/mesa/drivers/dri/i965/intel_mipmap_tree.c |  4 ++--
 2 files changed, 8 insertions(+), 8 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/brw_tex_layout.c b/src/mesa/drivers/dri/i965/brw_tex_layout.c
index 998d8c4..4007697 100644
--- a/src/mesa/drivers/dri/i965/brw_tex_layout.c
+++ b/src/mesa/drivers/dri/i965/brw_tex_layout.c
@@ -367,7 +367,7 @@ brw_miptree_layout_2d(struct intel_mipmap_tree *mt)
    mt->total_width = mt->physical_width0;
 
    if (mt->compressed) {
-       mt->total_width = ALIGN(mt->physical_width0, mt->align_w);
+       mt->total_width = ALIGN_NPOT(mt->physical_width0, mt->align_w);
    }
 
    /* May need to adjust width to accommodate the placement of
@@ -379,10 +379,10 @@ brw_miptree_layout_2d(struct intel_mipmap_tree *mt)
        unsigned mip1_width;
 
        if (mt->compressed) {
-          mip1_width = ALIGN(minify(mt->physical_width0, 1), mt->align_w) +
-             ALIGN(minify(mt->physical_width0, 2), bw);
+          mip1_width = ALIGN_NPOT(minify(mt->physical_width0, 1), mt->align_w) +
+             ALIGN_NPOT(minify(mt->physical_width0, 2), bw);
        } else {
-          mip1_width = ALIGN(minify(mt->physical_width0, 1), mt->align_w) +
+          mip1_width = ALIGN_NPOT(minify(mt->physical_width0, 1), mt->align_w) +
              minify(mt->physical_width0, 2);
        }
 
@@ -398,7 +398,7 @@ brw_miptree_layout_2d(struct intel_mipmap_tree *mt)
 
       intel_miptree_set_level_info(mt, level, x, y, depth);
 
-      img_height = ALIGN(height, mt->align_h);
+      img_height = ALIGN_NPOT(height, mt->align_h);
       if (mt->compressed)
 	 img_height /= bh;
 
@@ -415,7 +415,7 @@ brw_miptree_layout_2d(struct intel_mipmap_tree *mt)
       /* Layout_below: step right after second mipmap.
        */
       if (level == mt->first_level + 1) {
-	 x += ALIGN(width, mt->align_w);
+	 x += ALIGN_NPOT(width, mt->align_w);
       } else {
 	 y += img_height;
       }
diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
index 6aa969a..b47f49d0 100644
--- a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
+++ b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
@@ -1213,8 +1213,8 @@ intel_miptree_copy_slice(struct brw_context *brw,
    if (dst_mt->compressed) {
       unsigned int i, j;
       _mesa_get_format_block_size(dst_mt->format, &i, &j);
-      height = ALIGN(height, j) / j;
-      width = ALIGN(width, i);
+      height = ALIGN_NPOT(height, j) / j;
+      width = ALIGN_NPOT(width, i);
    }
 
    /* If it's a packed depth/stencil buffer with separate stencil, the blit
-- 
2.4.2



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