[Mesa-dev] [PATCH 11/16] i965: Pull calls to get_shader_time_index out of the visitor
Jason Ekstrand
jason at jlekstrand.net
Mon Jun 22 18:07:31 PDT 2015
---
src/mesa/drivers/dri/i965/brw_cs.cpp | 8 +++-
src/mesa/drivers/dri/i965/brw_fs.cpp | 55 ++++++++---------------
src/mesa/drivers/dri/i965/brw_fs.h | 7 ++-
src/mesa/drivers/dri/i965/brw_fs_visitor.cpp | 7 ++-
src/mesa/drivers/dri/i965/brw_vec4.cpp | 25 ++++++-----
src/mesa/drivers/dri/i965/brw_vec4.h | 7 ++-
src/mesa/drivers/dri/i965/brw_vec4_gs_visitor.cpp | 18 +++++---
src/mesa/drivers/dri/i965/brw_vec4_gs_visitor.h | 3 +-
src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp | 4 +-
src/mesa/drivers/dri/i965/brw_vec4_vs_visitor.cpp | 5 ++-
src/mesa/drivers/dri/i965/brw_vs.h | 3 +-
src/mesa/drivers/dri/i965/gen6_gs_visitor.h | 5 ++-
12 files changed, 75 insertions(+), 72 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_cs.cpp b/src/mesa/drivers/dri/i965/brw_cs.cpp
index 0833404..fa8b5c8 100644
--- a/src/mesa/drivers/dri/i965/brw_cs.cpp
+++ b/src/mesa/drivers/dri/i965/brw_cs.cpp
@@ -88,10 +88,14 @@ brw_cs_emit(struct brw_context *brw,
cfg_t *cfg = NULL;
const char *fail_msg = NULL;
+ int st_index = -1;
+ if (INTEL_DEBUG & DEBUG_SHADER_TIME)
+ st_index = brw_get_shader_time_index(brw, prog, &cp->Base, ST_CS);
+
/* Now the main event: Visit the shader IR and generate our CS IR for it.
*/
fs_visitor v8(brw, mem_ctx, MESA_SHADER_COMPUTE, key, &prog_data->base, prog,
- &cp->Base, 8);
+ &cp->Base, 8, st_index);
if (!v8.run_cs()) {
fail_msg = v8.fail_msg;
} else if (local_workgroup_size <= 8 * brw->max_cs_threads) {
@@ -100,7 +104,7 @@ brw_cs_emit(struct brw_context *brw,
}
fs_visitor v16(brw, mem_ctx, MESA_SHADER_COMPUTE, key, &prog_data->base, prog,
- &cp->Base, 16);
+ &cp->Base, 16, st_index);
if (likely(!(INTEL_DEBUG & DEBUG_NO16)) &&
!fail_msg && !v8.simd16_unsupported &&
local_workgroup_size <= 16 * brw->max_cs_threads) {
diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp b/src/mesa/drivers/dri/i965/brw_fs.cpp
index c1bfe86..252196a 100644
--- a/src/mesa/drivers/dri/i965/brw_fs.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs.cpp
@@ -578,31 +578,6 @@ fs_visitor::emit_shader_time_begin()
void
fs_visitor::emit_shader_time_end()
{
- enum shader_time_shader_type type;
- switch (stage) {
- case MESA_SHADER_VERTEX:
- type = ST_VS;
- break;
- case MESA_SHADER_GEOMETRY:
- type = ST_GS;
- break;
- case MESA_SHADER_FRAGMENT:
- if (dispatch_width == 8) {
- type = ST_FS8;
- } else {
- assert(dispatch_width == 16);
- type = ST_FS16;
- }
- break;
- case MESA_SHADER_COMPUTE:
- type = ST_CS;
- break;
- default:
- unreachable("fs_visitor::emit_shader_time_end missing code");
- }
- int shader_time_index = brw_get_shader_time_index(brw, shader_prog, prog,
- type);
-
/* Insert our code just before the final SEND with EOT. */
exec_node *end = this->instructions.get_tail();
assert(end && ((fs_inst *) end)->eot);
@@ -631,16 +606,16 @@ fs_visitor::emit_shader_time_end()
* trying to determine the time taken for single instructions.
*/
ibld.ADD(diff, diff, fs_reg(-2u));
- SHADER_TIME_ADD(ibld, shader_time_index, 0, diff);
- SHADER_TIME_ADD(ibld, shader_time_index, 1, fs_reg(1u));
+ SHADER_TIME_ADD(ibld, 0, diff);
+ SHADER_TIME_ADD(ibld, 1, fs_reg(1u));
ibld.emit(BRW_OPCODE_ELSE);
- SHADER_TIME_ADD(ibld, shader_time_index, 2, fs_reg(1u));
+ SHADER_TIME_ADD(ibld, 2, fs_reg(1u));
ibld.emit(BRW_OPCODE_ENDIF);
}
void
fs_visitor::SHADER_TIME_ADD(const fs_builder &bld,
- int shader_time_index, int shader_time_subindex,
+ int shader_time_subindex,
fs_reg value)
{
int index = shader_time_index * 3 + shader_time_subindex;
@@ -3823,7 +3798,7 @@ fs_visitor::run_vs()
assign_common_binding_table_offsets(0);
setup_vs_payload();
- if (INTEL_DEBUG & DEBUG_SHADER_TIME)
+ if (shader_time_index >= 0)
emit_shader_time_begin();
emit_nir_code();
@@ -3833,7 +3808,7 @@ fs_visitor::run_vs()
emit_urb_writes();
- if (INTEL_DEBUG & DEBUG_SHADER_TIME)
+ if (shader_time_index >= 0)
emit_shader_time_end();
calculate_cfg();
@@ -3871,7 +3846,7 @@ fs_visitor::run_fs()
} else if (brw->use_rep_send && dispatch_width == 16) {
emit_repclear_shader();
} else {
- if (INTEL_DEBUG & DEBUG_SHADER_TIME)
+ if (shader_time_index >= 0)
emit_shader_time_begin();
calculate_urb_setup();
@@ -3906,7 +3881,7 @@ fs_visitor::run_fs()
emit_fb_writes();
- if (INTEL_DEBUG & DEBUG_SHADER_TIME)
+ if (shader_time_index >= 0)
emit_shader_time_end();
calculate_cfg();
@@ -3950,7 +3925,7 @@ fs_visitor::run_cs()
setup_cs_payload();
- if (INTEL_DEBUG & DEBUG_SHADER_TIME)
+ if (shader_time_index >= 0)
emit_shader_time_begin();
emit_nir_code();
@@ -3960,7 +3935,7 @@ fs_visitor::run_cs()
emit_cs_terminate();
- if (INTEL_DEBUG & DEBUG_SHADER_TIME)
+ if (shader_time_index >= 0)
emit_shader_time_end();
calculate_cfg();
@@ -4010,10 +3985,16 @@ brw_wm_fs_emit(struct brw_context *brw,
if (unlikely(INTEL_DEBUG & DEBUG_WM))
brw_dump_ir("fragment", prog, &shader->base, &fp->Base);
+ int st_index8 = -1, st_index16 = -1;
+ if (INTEL_DEBUG & DEBUG_SHADER_TIME) {
+ st_index8 = brw_get_shader_time_index(brw, prog, &fp->Base, ST_FS8);
+ st_index16 = brw_get_shader_time_index(brw, prog, &fp->Base, ST_FS16);
+ }
+
/* Now the main event: Visit the shader IR and generate our FS IR for it.
*/
fs_visitor v(brw, mem_ctx, MESA_SHADER_FRAGMENT, key, &prog_data->base,
- prog, &fp->Base, 8);
+ prog, &fp->Base, 8, st_index8);
if (!v.run_fs()) {
if (prog) {
prog->LinkStatus = false;
@@ -4028,7 +4009,7 @@ brw_wm_fs_emit(struct brw_context *brw,
cfg_t *simd16_cfg = NULL;
fs_visitor v2(brw, mem_ctx, MESA_SHADER_FRAGMENT, key, &prog_data->base,
- prog, &fp->Base, 16);
+ prog, &fp->Base, 16, st_index16);
if (likely(!(INTEL_DEBUG & DEBUG_NO16) || brw->use_rep_send)) {
if (!v.simd16_unsupported) {
/* Try a SIMD16 compile */
diff --git a/src/mesa/drivers/dri/i965/brw_fs.h b/src/mesa/drivers/dri/i965/brw_fs.h
index 55a9722..525be3a 100644
--- a/src/mesa/drivers/dri/i965/brw_fs.h
+++ b/src/mesa/drivers/dri/i965/brw_fs.h
@@ -77,7 +77,8 @@ public:
struct brw_stage_prog_data *prog_data,
struct gl_shader_program *shader_prog,
struct gl_program *prog,
- unsigned dispatch_width);
+ unsigned dispatch_width,
+ int shader_time_index);
~fs_visitor();
@@ -278,7 +279,7 @@ public:
void emit_shader_time_begin();
void emit_shader_time_end();
void SHADER_TIME_ADD(const brw::fs_builder &bld,
- int shader_time_index, int shader_time_subindex,
+ int shader_time_subindex,
fs_reg value);
void emit_untyped_atomic(unsigned atomic_op, unsigned surf_index,
@@ -387,6 +388,8 @@ public:
const unsigned dispatch_width; /**< 8 or 16 */
+ int shader_time_index;
+
unsigned promoted_constants;
brw::fs_builder bld;
};
diff --git a/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp b/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
index cafe64a..9ce8491 100644
--- a/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
@@ -1983,10 +1983,13 @@ fs_visitor::fs_visitor(struct brw_context *brw,
struct brw_stage_prog_data *prog_data,
struct gl_shader_program *shader_prog,
struct gl_program *prog,
- unsigned dispatch_width)
+ unsigned dispatch_width,
+ int shader_time_index)
: backend_shader(brw, shader_prog, prog, prog_data, stage),
key(key), prog_data(prog_data),
- dispatch_width(dispatch_width), promoted_constants(0),
+ dispatch_width(dispatch_width),
+ shader_time_index(shader_time_index),
+ promoted_constants(0),
bld(fs_builder(this, dispatch_width).at_end())
{
this->mem_ctx = mem_ctx;
diff --git a/src/mesa/drivers/dri/i965/brw_vec4.cpp b/src/mesa/drivers/dri/i965/brw_vec4.cpp
index 234ee18..093802c 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4.cpp
+++ b/src/mesa/drivers/dri/i965/brw_vec4.cpp
@@ -1676,20 +1676,15 @@ vec4_visitor::emit_shader_time_end()
*/
emit(ADD(diff, src_reg(diff), src_reg(-2u)));
- int shader_time_index =
- brw_get_shader_time_index(brw, shader_prog, prog, st_type);
-
- emit_shader_time_write(shader_time_index, 0, src_reg(diff));
- emit_shader_time_write(shader_time_index, 1, src_reg(1u));
+ emit_shader_time_write(0, src_reg(diff));
+ emit_shader_time_write(1, src_reg(1u));
emit(BRW_OPCODE_ELSE);
- emit_shader_time_write(shader_time_index, 2, src_reg(1u));
+ emit_shader_time_write(2, src_reg(1u));
emit(BRW_OPCODE_ENDIF);
}
void
-vec4_visitor::emit_shader_time_write(int shader_time_index,
- int shader_time_subindex,
- src_reg value)
+vec4_visitor::emit_shader_time_write(int shader_time_subindex, src_reg value)
{
dst_reg dst =
dst_reg(this, glsl_type::get_array_instance(glsl_type::vec4_type, 2));
@@ -1715,7 +1710,7 @@ vec4_visitor::run()
{
sanity_param_count = prog->Parameters->NumParameters;
- if (INTEL_DEBUG & DEBUG_SHADER_TIME)
+ if (shader_time_index >= 0)
emit_shader_time_begin();
assign_binding_table_offsets();
@@ -1881,6 +1876,11 @@ brw_vs_emit(struct brw_context *brw,
if (prog)
shader = (brw_shader *) prog->_LinkedShaders[MESA_SHADER_VERTEX];
+ int st_index = -1;
+ if (INTEL_DEBUG & DEBUG_SHADER_TIME)
+ st_index = brw_get_shader_time_index(brw, prog, &c->vp->program.Base,
+ ST_VS);
+
if (unlikely(INTEL_DEBUG & DEBUG_VS))
brw_dump_ir("vertex", prog, &shader->base, &c->vp->program.Base);
@@ -1899,7 +1899,8 @@ brw_vs_emit(struct brw_context *brw,
prog_data->base.dispatch_mode = DISPATCH_MODE_SIMD8;
fs_visitor v(brw, mem_ctx, MESA_SHADER_VERTEX, &c->key,
- &prog_data->base.base, prog, &c->vp->program.Base, 8);
+ &prog_data->base.base, prog, &c->vp->program.Base,
+ 8, st_index);
if (!v.run_vs()) {
if (prog) {
prog->LinkStatus = false;
@@ -1937,7 +1938,7 @@ brw_vs_emit(struct brw_context *brw,
if (!assembly) {
prog_data->base.dispatch_mode = DISPATCH_MODE_4X2_DUAL_OBJECT;
- vec4_vs_visitor v(brw, c, prog_data, prog, mem_ctx);
+ vec4_vs_visitor v(brw, c, prog_data, prog, mem_ctx, st_index);
if (!v.run()) {
if (prog) {
prog->LinkStatus = false;
diff --git a/src/mesa/drivers/dri/i965/brw_vec4.h b/src/mesa/drivers/dri/i965/brw_vec4.h
index 8d332af..4a3ce62 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4.h
+++ b/src/mesa/drivers/dri/i965/brw_vec4.h
@@ -85,7 +85,7 @@ public:
gl_shader_stage stage,
void *mem_ctx,
bool no_spills,
- shader_time_shader_type st_type);
+ int shader_time_index);
~vec4_visitor();
dst_reg dst_null_f()
@@ -343,8 +343,7 @@ public:
void emit_shader_time_begin();
void emit_shader_time_end();
- void emit_shader_time_write(int shader_time_index, int shader_time_subindex,
- src_reg value);
+ void emit_shader_time_write(int shader_time_subindex, src_reg value);
void emit_untyped_atomic(unsigned atomic_op, unsigned surf_index,
dst_reg dst, src_reg offset, src_reg src0,
@@ -411,7 +410,7 @@ private:
*/
const bool no_spills;
- const shader_time_shader_type st_type;
+ int shader_time_index;
};
diff --git a/src/mesa/drivers/dri/i965/brw_vec4_gs_visitor.cpp b/src/mesa/drivers/dri/i965/brw_vec4_gs_visitor.cpp
index d3754de..9ba9641 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4_gs_visitor.cpp
+++ b/src/mesa/drivers/dri/i965/brw_vec4_gs_visitor.cpp
@@ -38,10 +38,11 @@ vec4_gs_visitor::vec4_gs_visitor(struct brw_context *brw,
struct brw_gs_compile *c,
struct gl_shader_program *prog,
void *mem_ctx,
- bool no_spills)
+ bool no_spills,
+ int shader_time_index)
: vec4_visitor(brw, &c->base, &c->gp->program.Base, &c->key.base,
&c->prog_data.base, prog, MESA_SHADER_GEOMETRY, mem_ctx,
- no_spills, ST_GS),
+ no_spills, shader_time_index),
c(c)
{
}
@@ -648,6 +649,10 @@ brw_gs_emit(struct brw_context *brw,
brw_dump_ir("geometry", prog, &shader->base, NULL);
}
+ int st_index = -1;
+ if (INTEL_DEBUG & DEBUG_SHADER_TIME)
+ st_index = brw_get_shader_time_index(brw, prog, NULL, ST_GS);
+
if (brw->gen >= 7) {
/* Compile the geometry shader in DUAL_OBJECT dispatch mode, if we can do
* so without spilling. If the GS invocations count > 1, then we can't use
@@ -657,7 +662,8 @@ brw_gs_emit(struct brw_context *brw,
likely(!(INTEL_DEBUG & DEBUG_NO_DUAL_OBJECT_GS))) {
c->prog_data.base.dispatch_mode = DISPATCH_MODE_4X2_DUAL_OBJECT;
- vec4_gs_visitor v(brw, c, prog, mem_ctx, true /* no_spills */);
+ vec4_gs_visitor v(brw, c, prog, mem_ctx, true /* no_spills */,
+ st_index);
if (v.run()) {
return generate_assembly(brw, prog, &c->gp->program.Base,
&c->prog_data.base, mem_ctx, v.cfg,
@@ -698,9 +704,11 @@ brw_gs_emit(struct brw_context *brw,
const unsigned *ret = NULL;
if (brw->gen >= 7)
- gs = new vec4_gs_visitor(brw, c, prog, mem_ctx, false /* no_spills */);
+ gs = new vec4_gs_visitor(brw, c, prog, mem_ctx, false /* no_spills */,
+ st_index);
else
- gs = new gen6_gs_visitor(brw, c, prog, mem_ctx, false /* no_spills */);
+ gs = new gen6_gs_visitor(brw, c, prog, mem_ctx, false /* no_spills */,
+ st_index);
if (!gs->run()) {
prog->LinkStatus = false;
diff --git a/src/mesa/drivers/dri/i965/brw_vec4_gs_visitor.h b/src/mesa/drivers/dri/i965/brw_vec4_gs_visitor.h
index bcb5a2b..f42311d 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4_gs_visitor.h
+++ b/src/mesa/drivers/dri/i965/brw_vec4_gs_visitor.h
@@ -72,7 +72,8 @@ public:
struct brw_gs_compile *c,
struct gl_shader_program *prog,
void *mem_ctx,
- bool no_spills);
+ bool no_spills,
+ int shader_time_index);
protected:
virtual dst_reg *make_reg_for_system_value(ir_variable *ir);
diff --git a/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp b/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp
index 7028a59..7c44acf 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp
+++ b/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp
@@ -3688,7 +3688,7 @@ vec4_visitor::vec4_visitor(struct brw_context *brw,
gl_shader_stage stage,
void *mem_ctx,
bool no_spills,
- shader_time_shader_type st_type)
+ int shader_time_index)
: backend_shader(brw, shader_prog, prog, &prog_data->base, stage),
c(c),
key(key),
@@ -3698,7 +3698,7 @@ vec4_visitor::vec4_visitor(struct brw_context *brw,
first_non_payload_grf(0),
need_all_constants_in_pull_buffer(false),
no_spills(no_spills),
- st_type(st_type)
+ shader_time_index(shader_time_index)
{
this->mem_ctx = mem_ctx;
this->failed = false;
diff --git a/src/mesa/drivers/dri/i965/brw_vec4_vs_visitor.cpp b/src/mesa/drivers/dri/i965/brw_vec4_vs_visitor.cpp
index 731176a..dc17755 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4_vs_visitor.cpp
+++ b/src/mesa/drivers/dri/i965/brw_vec4_vs_visitor.cpp
@@ -216,12 +216,13 @@ vec4_vs_visitor::vec4_vs_visitor(struct brw_context *brw,
struct brw_vs_compile *vs_compile,
struct brw_vs_prog_data *vs_prog_data,
struct gl_shader_program *prog,
- void *mem_ctx)
+ void *mem_ctx,
+ int shader_time_index)
: vec4_visitor(brw, &vs_compile->base, &vs_compile->vp->program.Base,
&vs_compile->key.base, &vs_prog_data->base, prog,
MESA_SHADER_VERTEX,
mem_ctx, false /* no_spills */,
- ST_VS),
+ shader_time_index),
vs_compile(vs_compile),
vs_prog_data(vs_prog_data)
{
diff --git a/src/mesa/drivers/dri/i965/brw_vs.h b/src/mesa/drivers/dri/i965/brw_vs.h
index 6157ae6..6f84179 100644
--- a/src/mesa/drivers/dri/i965/brw_vs.h
+++ b/src/mesa/drivers/dri/i965/brw_vs.h
@@ -94,7 +94,8 @@ public:
struct brw_vs_compile *vs_compile,
struct brw_vs_prog_data *vs_prog_data,
struct gl_shader_program *prog,
- void *mem_ctx);
+ void *mem_ctx,
+ int shader_time_index);
protected:
virtual dst_reg *make_reg_for_system_value(ir_variable *ir);
diff --git a/src/mesa/drivers/dri/i965/gen6_gs_visitor.h b/src/mesa/drivers/dri/i965/gen6_gs_visitor.h
index 28f23c9..863fbd0 100644
--- a/src/mesa/drivers/dri/i965/gen6_gs_visitor.h
+++ b/src/mesa/drivers/dri/i965/gen6_gs_visitor.h
@@ -39,8 +39,9 @@ public:
struct brw_gs_compile *c,
struct gl_shader_program *prog,
void *mem_ctx,
- bool no_spills) :
- vec4_gs_visitor(brw, c, prog, mem_ctx, no_spills) {}
+ bool no_spills,
+ int shader_time_index) :
+ vec4_gs_visitor(brw, c, prog, mem_ctx, no_spills, shader_time_index) {}
protected:
virtual void assign_binding_table_offsets();
--
2.4.3
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