[Mesa-dev] [PATCH 33/78] i965/nir/vec4: Implement float-related functions

[Eduardo Lima Mitev]

From: Antia Puentes <apuentes at igalia.com>

Adds NIR ALU operations:
   * nir_op_ftrunc
   * nir_op_fceil
   * nir_op_ffloor
   * nir_op_ffrac
   * nir_op_fround_even

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=89580
---
 src/mesa/drivers/dri/i965/brw_vec4_nir.cpp | 40 ++++++++++++++++++++++++++++++
 1 file changed, 40 insertions(+)

diff --git a/src/mesa/drivers/dri/i965/brw_vec4_nir.cpp b/src/mesa/drivers/dri/i965/brw_vec4_nir.cpp
index 12fdb48..57685bb 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4_nir.cpp
+++ b/src/mesa/drivers/dri/i965/brw_vec4_nir.cpp
@@ -855,6 +855,46 @@ vec4_visitor::nir_emit_alu(nir_alu_instr *instr)
       break;
    }
 
+   case nir_op_ftrunc:
+      inst = emit(RNDZ(dst, op[0]));
+      inst->saturate = instr->dest.saturate;
+      break;
+
+   case nir_op_fceil: {
+      /* Get the number of components of the source to create a
+       * temporary register with the appropriate glsl type.
+       */
+      int num_components = instr->src[0].src.is_ssa ?
+         instr->src[0].src.ssa->num_components :
+         instr->src[0].src.reg.reg->num_components;
+      assert(num_components > 0);
+
+      src_reg tmp = src_reg(this, glsl_type::float_type, num_components);
+      tmp.swizzle = brw_swizzle_for_size(num_components);
+
+      op[0].negate = !op[0].negate;
+      emit(RNDD(dst_reg(tmp), op[0]));
+      tmp.negate = true;
+      inst = emit(MOV(dst, tmp));
+      inst->saturate = instr->dest.saturate;
+      break;
+   }
+
+   case nir_op_ffloor:
+      inst = emit(RNDD(dst, op[0]));
+      inst->saturate = instr->dest.saturate;
+      break;
+
+   case nir_op_ffract:
+      inst = emit(FRC(dst, op[0]));
+      inst->saturate = instr->dest.saturate;
+      break;
+
+   case nir_op_fround_even:
+      inst = emit(RNDE(dst, op[0]));
+      inst->saturate = instr->dest.saturate;
+      break;
+
    default:
       unreachable("Unimplemented ALU operation");
    }
-- 
2.1.4