[Mesa-dev] [PATCH v2 04/19] i965/fs: Report the right value in fs_inst::regs_read() for PIXEL_X/Y

Francisco Jerez currojerez at riseup.net
Mon Jun 29 11:20:38 PDT 2015


Jason Ekstrand <jason at jlekstrand.net> writes:

> Reviewed-by: Iago Toral Quiroga <itoral at igalia.com>
> Reviewed-by: Topi Pohjolainen <topi.pohjolainen at intel.com>
> ---
>  src/mesa/drivers/dri/i965/brw_fs.cpp | 6 ++++++
>  1 file changed, 6 insertions(+)
>
> diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp b/src/mesa/drivers/dri/i965/brw_fs.cpp
> index 589b74c..6cf9e96 100644
> --- a/src/mesa/drivers/dri/i965/brw_fs.cpp
> +++ b/src/mesa/drivers/dri/i965/brw_fs.cpp
> @@ -726,6 +726,12 @@ fs_inst::regs_read(int arg) const
>           return exec_size / 4;
>        break;
>  
> +   case FS_OPCODE_PIXEL_X:
> +   case FS_OPCODE_PIXEL_Y:
> +      if (arg == 0)
> +         return 2;
> +      break;
> +

This doesn't look right.  AFAICT PIXEL_X/Y take two exec_size-wide
components of UW type (interleaved for each subspan, but that doesn't
matter here), i.e. two registers in SIMD16 mode but only one register in
SIMD8 mode.

>     default:
>        if (is_tex() && arg == 0 && src[0].file == GRF)
>           return mlen;
> -- 
> 2.4.3
>
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