[Mesa-dev] [PATCH 2/2] radeonsi/compute: Use value from compiler for COMPUTE_PGM_RSRC1.FLOAT_MODE
Tom Stellard
thomas.stellard at amd.com
Fri Mar 6 07:53:26 PST 2015
---
src/gallium/drivers/radeonsi/si_compute.c | 3 ++-
src/gallium/drivers/radeonsi/si_shader.c | 1 +
src/gallium/drivers/radeonsi/si_shader.h | 1 +
3 files changed, 4 insertions(+), 1 deletion(-)
diff --git a/src/gallium/drivers/radeonsi/si_compute.c b/src/gallium/drivers/radeonsi/si_compute.c
index 5009f69..8609b89 100644
--- a/src/gallium/drivers/radeonsi/si_compute.c
+++ b/src/gallium/drivers/radeonsi/si_compute.c
@@ -377,7 +377,8 @@ static void si_launch_grid(
* XXX: The compiler should account for this.
*/
| S_00B848_SGPRS(((MAX2(4 + arg_user_sgpr_count,
- shader->num_sgprs)) - 1) / 8))
+ shader->num_sgprs)) - 1) / 8)
+ | S_00B028_FLOAT_MODE(shader->float_mode))
;
lds_blocks = shader->lds_size;
diff --git a/src/gallium/drivers/radeonsi/si_shader.c b/src/gallium/drivers/radeonsi/si_shader.c
index b0417ed..87aef4d 100644
--- a/src/gallium/drivers/radeonsi/si_shader.c
+++ b/src/gallium/drivers/radeonsi/si_shader.c
@@ -2546,6 +2546,7 @@ void si_shader_binary_read_config(const struct si_screen *sscreen,
case R_00B848_COMPUTE_PGM_RSRC1:
shader->num_sgprs = MAX2(shader->num_sgprs, (G_00B028_SGPRS(value) + 1) * 8);
shader->num_vgprs = MAX2(shader->num_vgprs, (G_00B028_VGPRS(value) + 1) * 4);
+ shader->float_mode = G_00B028_FLOAT_MODE(value);
break;
case R_00B02C_SPI_SHADER_PGM_RSRC2_PS:
shader->lds_size = MAX2(shader->lds_size, G_00B02C_EXTRA_LDS_SIZE(value));
diff --git a/src/gallium/drivers/radeonsi/si_shader.h b/src/gallium/drivers/radeonsi/si_shader.h
index 551c7dc..4f2bb91 100644
--- a/src/gallium/drivers/radeonsi/si_shader.h
+++ b/src/gallium/drivers/radeonsi/si_shader.h
@@ -149,6 +149,7 @@ struct si_shader {
unsigned num_vgprs;
unsigned lds_size;
unsigned spi_ps_input_ena;
+ unsigned float_mode;
unsigned scratch_bytes_per_wave;
unsigned spi_shader_col_format;
unsigned spi_shader_z_format;
--
2.0.4
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