[Mesa-dev] [v2 06/12] i965: Move tex miptree and format resolving into dispatcher

Topi Pohjolainen topi.pohjolainen at intel.com
Wed May 6 04:25:12 PDT 2015


All hardware platforms have this in common, so do it in the
hardware independent dispatcher.

v2 (Matt): Removed extra whitespace.

Reviewed-by: Matt Turner <mattst88 at gmail.com> (v1)
Reviewed-by: Kenneth Graunke <kenneth at whitecape.org> (v1)
Signed-off-by: Topi Pohjolainen <topi.pohjolainen at intel.com>
---
 src/mesa/drivers/dri/i965/brw_context.h           |  4 ++-
 src/mesa/drivers/dri/i965/brw_wm_surface_state.c  | 30 ++++++++++++++++-------
 src/mesa/drivers/dri/i965/gen7_wm_surface_state.c | 11 +++------
 src/mesa/drivers/dri/i965/gen8_surface_state.c    | 16 +++---------
 4 files changed, 30 insertions(+), 31 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/brw_context.h b/src/mesa/drivers/dri/i965/brw_context.h
index 659d465..a1d874c 100644
--- a/src/mesa/drivers/dri/i965/brw_context.h
+++ b/src/mesa/drivers/dri/i965/brw_context.h
@@ -984,7 +984,9 @@ struct brw_context
    struct
    {
       void (*update_texture_surface)(struct gl_context *ctx,
-                                     unsigned unit,
+                                     const struct intel_mipmap_tree *mt,
+                                     struct gl_texture_object *tObj,
+                                     uint32_t tex_format,
                                      uint32_t *surf_offset,
                                      bool for_gather);
       uint32_t (*update_renderbuffer_surface)(struct brw_context *brw,
diff --git a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
index cf9b045..f247307 100644
--- a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
+++ b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
@@ -309,23 +309,19 @@ update_buffer_texture_surface(struct gl_context *ctx,
 
 static void
 brw_update_texture_surface(struct gl_context *ctx,
-                           unsigned unit,
+                           const struct intel_mipmap_tree *mt,
+                           struct gl_texture_object *tObj,
+                           uint32_t tex_format,
                            uint32_t *surf_offset,
                            bool for_gather)
 {
    struct brw_context *brw = brw_context(ctx);
-   struct gl_texture_object *tObj = ctx->Texture.Unit[unit]._Current;
    struct intel_texture_object *intelObj = intel_texture_object(tObj);
-   struct intel_mipmap_tree *mt = intelObj->mt;
-   struct gl_sampler_object *sampler = _mesa_get_samplerobj(ctx, unit);
    uint32_t *surf;
 
    surf = brw_state_batch(brw, AUB_TRACE_SURFACE_STATE,
 			  6 * 4, 32, surf_offset);
 
-   uint32_t tex_format = translate_tex_format(brw, mt->format,
-                                              sampler->sRGBDecode);
-
    if (for_gather) {
       /* Sandybridge's gather4 message is broken for integer formats.
        * To work around this, we pretend the surface is UNORM for
@@ -796,14 +792,30 @@ update_texture_surface(struct gl_context *ctx,
                        bool for_gather)
 {
    struct brw_context *brw = brw_context(ctx);
-   const struct gl_texture_object *tObj = ctx->Texture.Unit[unit]._Current;
+   struct gl_texture_object *tObj = ctx->Texture.Unit[unit]._Current;
+   struct intel_texture_object *intelObj = intel_texture_object(tObj);
+   const struct intel_mipmap_tree *mt = intelObj->mt;
+   const struct gl_texture_image *firstImage = tObj->Image[0][tObj->BaseLevel];
+   const struct gl_sampler_object *sampler = _mesa_get_samplerobj(ctx, unit);
 
    if (tObj->Target == GL_TEXTURE_BUFFER) {
       update_buffer_texture_surface(ctx, unit, surf_offset);
       return;
    }
 
-   brw->vtbl.update_texture_surface(ctx, unit, surf_offset, for_gather);
+   mesa_format format = intelObj->_Format;
+   if (tObj->StencilSampling && firstImage->_BaseFormat == GL_DEPTH_STENCIL) {
+      assert(brw->gen >= 8);
+      mt = mt->stencil_mt;
+      assert(mt->format == MESA_FORMAT_S_UINT8);
+      format = mt->format;
+   }
+
+   const uint32_t tex_format = translate_tex_format(brw, format,
+                                                    sampler->sRGBDecode);
+
+   brw->vtbl.update_texture_surface(ctx, mt, tObj, tex_format, surf_offset,
+                                    for_gather);
 }
 
 static void
diff --git a/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c b/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c
index 7779966..53bcd15 100644
--- a/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c
+++ b/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c
@@ -265,25 +265,20 @@ gen7_emit_buffer_surface_state(struct brw_context *brw,
 
 static void
 gen7_update_texture_surface(struct gl_context *ctx,
-                            unsigned unit,
+                            const struct intel_mipmap_tree *mt,
+                            struct gl_texture_object *tObj,
+                            uint32_t tex_format,
                             uint32_t *surf_offset,
                             bool for_gather)
 {
    struct brw_context *brw = brw_context(ctx);
-   struct gl_texture_object *tObj = ctx->Texture.Unit[unit]._Current;
    struct intel_texture_object *intelObj = intel_texture_object(tObj);
-   struct intel_mipmap_tree *mt = intelObj->mt;
    struct gl_texture_image *firstImage = tObj->Image[0][tObj->BaseLevel];
-   struct gl_sampler_object *sampler = _mesa_get_samplerobj(ctx, unit);
 
    uint32_t *surf = brw_state_batch(brw, AUB_TRACE_SURFACE_STATE,
                                     8 * 4, 32, surf_offset);
    memset(surf, 0, 8 * 4);
 
-   uint32_t tex_format = translate_tex_format(brw,
-                                              intelObj->_Format,
-                                              sampler->sRGBDecode);
-
    if (for_gather && tex_format == BRW_SURFACEFORMAT_R32G32_FLOAT)
       tex_format = BRW_SURFACEFORMAT_R32G32_FLOAT_LD;
 
diff --git a/src/mesa/drivers/dri/i965/gen8_surface_state.c b/src/mesa/drivers/dri/i965/gen8_surface_state.c
index 5a94117..4c4319c 100644
--- a/src/mesa/drivers/dri/i965/gen8_surface_state.c
+++ b/src/mesa/drivers/dri/i965/gen8_surface_state.c
@@ -151,27 +151,19 @@ gen8_emit_buffer_surface_state(struct brw_context *brw,
 
 static void
 gen8_update_texture_surface(struct gl_context *ctx,
-                            unsigned unit,
+                            const struct intel_mipmap_tree *mt,
+                            struct gl_texture_object *tObj,
+                            uint32_t tex_format,
                             uint32_t *surf_offset,
                             bool for_gather)
 {
    struct brw_context *brw = brw_context(ctx);
-   struct gl_texture_object *tObj = ctx->Texture.Unit[unit]._Current;
    struct intel_texture_object *intelObj = intel_texture_object(tObj);
-   struct intel_mipmap_tree *mt = intelObj->mt;
    struct gl_texture_image *firstImage = tObj->Image[0][tObj->BaseLevel];
-   struct gl_sampler_object *sampler = _mesa_get_samplerobj(ctx, unit);
    struct intel_mipmap_tree *aux_mt = NULL;
    uint32_t aux_mode = 0;
-   mesa_format format = intelObj->_Format;
    uint32_t mocs_wb = brw->gen >= 9 ? SKL_MOCS_WB : BDW_MOCS_WB;
 
-   if (tObj->StencilSampling && firstImage->_BaseFormat == GL_DEPTH_STENCIL) {
-      mt = mt->stencil_mt;
-      format = MESA_FORMAT_S_UINT8;
-      assert(mt->format == MESA_FORMAT_S_UINT8);
-   }
-
    unsigned tiling_mode, pitch;
    if (mt->format == MESA_FORMAT_S_UINT8) {
       tiling_mode = GEN8_SURFACE_TILING_W;
@@ -193,8 +185,6 @@ gen8_update_texture_surface(struct gl_context *ctx,
       (tObj->Immutable && tObj->Target != GL_TEXTURE_3D) ? tObj->NumLayers
                                                          : mt->logical_depth0;
 
-   uint32_t tex_format = translate_tex_format(brw, format, sampler->sRGBDecode);
-
    uint32_t *surf = allocate_surface_state(brw, surf_offset);
 
    surf[0] = translate_tex_target(tObj->Target) << BRW_SURFACE_TYPE_SHIFT |
-- 
1.9.3



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