[Mesa-dev] [PATCH 5/7] i965: Pass texture target as parameter for surface setup

[Francisco Jerez]

From: Topi Pohjolainen <topi.pohjolainen at intel.com>

Also changed a couple of direct shifts into SET_FIELD().

Reviewed-by: Matt Turner <mattst88 at gmail.com>
Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>
Signed-off-by: Topi Pohjolainen <topi.pohjolainen at intel.com>
[ Francisco Jerez: Non-trivial rebase. ]
Reviewed-by: Francisco Jerez <currojerez at riseup.net>
---
 src/mesa/drivers/dri/i965/brw_context.h           |  1 +
 src/mesa/drivers/dri/i965/brw_wm_surface_state.c  | 12 ++++++------
 src/mesa/drivers/dri/i965/gen7_wm_surface_state.c |  4 ++--
 src/mesa/drivers/dri/i965/gen8_surface_state.c    |  4 ++--
 4 files changed, 11 insertions(+), 10 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/brw_context.h b/src/mesa/drivers/dri/i965/brw_context.h
index 0e9ede9..6f08b06 100644
--- a/src/mesa/drivers/dri/i965/brw_context.h
+++ b/src/mesa/drivers/dri/i965/brw_context.h
@@ -986,6 +986,7 @@ struct brw_context
       void (*update_texture_surface)(struct brw_context *brw,
                                      struct intel_mipmap_tree *mt,
                                      struct gl_texture_object *tObj,
+                                     GLenum target,
                                      unsigned min_layer,
                                      unsigned max_layer,
                                      uint32_t tex_format, unsigned swizzle,
diff --git a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
index 92383e1..fa4e36d 100644
--- a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
+++ b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
@@ -310,7 +310,7 @@ update_buffer_texture_surface(struct gl_context *ctx,
 static void
 brw_update_texture_surface(struct brw_context *brw,
                            struct intel_mipmap_tree *mt,
-                           struct gl_texture_object *tObj,
+                           struct gl_texture_object *tObj, GLenum target,
                            unsigned min_layer /* unused */,
                            unsigned max_layer /* unused */,
                            uint32_t tex_format, unsigned swizzle /* unused */,
@@ -352,10 +352,10 @@ brw_update_texture_surface(struct brw_context *brw,
       }
    }
 
-   surf[0] = (translate_tex_target(tObj->Target) << BRW_SURFACE_TYPE_SHIFT |
-	      BRW_SURFACE_MIPMAPLAYOUT_BELOW << BRW_SURFACE_MIPLAYOUT_SHIFT |
-	      BRW_SURFACE_CUBEFACE_ENABLES |
-	      tex_format << BRW_SURFACE_FORMAT_SHIFT);
+   surf[0] = SET_FIELD(translate_tex_target(target), BRW_SURFACE_TYPE) |
+             BRW_SURFACE_MIPMAPLAYOUT_BELOW << BRW_SURFACE_MIPLAYOUT_SHIFT |
+             BRW_SURFACE_CUBEFACE_ENABLES |
+             tex_format << BRW_SURFACE_FORMAT_SHIFT;
 
    surf[1] = mt->bo->offset64 + mt->offset; /* reloc */
 
@@ -827,7 +827,7 @@ update_texture_surface(struct gl_context *ctx,
          format = BRW_SURFACEFORMAT_R8_UINT;
       }
 
-      brw->vtbl.update_texture_surface(brw, mt, obj,
+      brw->vtbl.update_texture_surface(brw, mt, obj, obj->Target,
                                        obj->MinLayer, obj->MinLayer + depth,
                                        format, swizzle, surf_offset, for_gather);
    }
diff --git a/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c b/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c
index 9755236..89dba40 100644
--- a/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c
+++ b/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c
@@ -350,7 +350,7 @@ gen7_emit_texture_surface_state(struct brw_context *brw,
 static void
 gen7_update_texture_surface(struct brw_context *brw,
                             struct intel_mipmap_tree *mt,
-                            struct gl_texture_object *obj,
+                            struct gl_texture_object *obj, GLenum target,
                             unsigned min_layer,
                             unsigned max_layer,
                             uint32_t tex_format, unsigned swizzle,
@@ -361,7 +361,7 @@ gen7_update_texture_surface(struct brw_context *brw,
    if (for_gather && tex_format == BRW_SURFACEFORMAT_R32G32_FLOAT)
       tex_format = BRW_SURFACEFORMAT_R32G32_FLOAT_LD;
 
-   gen7_emit_texture_surface_state(brw, mt, obj->Target,
+   gen7_emit_texture_surface_state(brw, mt, target,
                                    min_layer, max_layer,
                                    obj->MinLevel + obj->BaseLevel,
                                    obj->MinLevel + intel_obj->_MaxLevel + 1,
diff --git a/src/mesa/drivers/dri/i965/gen8_surface_state.c b/src/mesa/drivers/dri/i965/gen8_surface_state.c
index 580c1a3..9858f5f 100644
--- a/src/mesa/drivers/dri/i965/gen8_surface_state.c
+++ b/src/mesa/drivers/dri/i965/gen8_surface_state.c
@@ -249,7 +249,7 @@ gen8_emit_texture_surface_state(struct brw_context *brw,
 static void
 gen8_update_texture_surface(struct brw_context *brw,
                             struct intel_mipmap_tree *mt,
-                            struct gl_texture_object *obj,
+                            struct gl_texture_object *obj, GLenum target,
                             unsigned min_layer,
                             unsigned max_layer,
                             uint32_t tex_format, unsigned swizzle,
@@ -258,7 +258,7 @@ gen8_update_texture_surface(struct brw_context *brw,
 {
    struct intel_texture_object *intel_obj = intel_texture_object(obj);
 
-   gen8_emit_texture_surface_state(brw, mt, obj->Target,
+   gen8_emit_texture_surface_state(brw, mt, target,
                                    min_layer, max_layer,
                                    obj->MinLevel + obj->BaseLevel,
                                    obj->MinLevel + intel_obj->_MaxLevel + 1,
-- 
2.3.5