[Mesa-dev] [RFC PATCH] nir: Transform 4*x into x << 2 during late optimizations.

Eric Anholt eric at anholt.net
Fri May 8 12:30:32 PDT 2015


Ilia Mirkin <imirkin at alum.mit.edu> writes:

> On Fri, May 8, 2015 at 6:36 AM, Kenneth Graunke <kenneth at whitecape.org> wrote:
>> +   # Multiplication by 4 comes up fairly often in indirect offset calculations.
>> +   # Some GPUs have weird integer multiplication limitations, but shifts should work
>> +   # equally well everywhere.
>> +   (('imul', 4, a), ('ishl', a, 2)),
>
> Not sure what the cost of doing it this way, but really you want all
> powers of 2... and also udiv -> shr. Since this is python, should be
> easy enough to append onto that list. AFAIK all GPU's prefer a shift
> over a mul. Adreno doen't have 32-bit imul in the first place (and no
> idiv either).

I can confirm that I'd love shifts instead of imul/udiv on vc4.
-------------- next part --------------
A non-text attachment was scrubbed...
Name: signature.asc
Type: application/pgp-signature
Size: 818 bytes
Desc: not available
URL: <http://lists.freedesktop.org/archives/mesa-dev/attachments/20150508/52eaec69/attachment.sig>


More information about the mesa-dev mailing list