[Mesa-dev] [RFC PATCH] nir: Transform 4*x into x << 2 during late optimizations.

Matt Turner mattst88 at gmail.com
Mon May 18 11:26:05 PDT 2015

On Fri, May 8, 2015 at 3:36 AM, Kenneth Graunke <kenneth at whitecape.org> wrote:
> According to Glenn, shifts on R600 have 5x the throughput as multiplies.
> Intel GPUs have strange integer multiplication restrictions - on most
> hardware, MUL actually only does a 32-bit x 16-bit multiply.  This
> means the arguments aren't commutative, which can limit our constant
> propagation options.  SHL has no such restrictions.
> Shifting is probably reasonable on most people's hardware, so let's just
> do that.
> i965 shader-db results (using NIR for VS):
> total instructions in shared programs: 7432587 -> 7388982 (-0.59%)
> instructions in affected programs:     1360411 -> 1316806 (-3.21%)
> helped:                                5772
> HURT:                                  0

Just to close the loop, I ran shader-db with this patch on top of my
integer multiplication series, and it doesn't change any instruction
counts on i965. (I also tried with all other power-of-two
multiplications for shift values < 31.)

We may want to do it for other reasons though.

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