[Mesa-dev] [PATCH] winsys/radeon: Use CPU page size instead of hardcoding 4096 bytes v2

Michel Dänzer michel at daenzer.net
Mon Nov 9 01:24:29 PST 2015


On 06.11.2015 20:58, Marek Olšák wrote:
> On Wed, Nov 4, 2015 at 11:05 AM, Michel Dänzer <michel at daenzer.net> wrote:
>> From: Michel Dänzer <michel.daenzer at amd.com>
>>
>> Fixes GPUVM conflicts with non-4K page size.
>>
>> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=92738
>>
>> v2: Replace sanitization of VM base address alignment with comment why
>>     that's not necessary.
>>
>> Cc: mesa-stable at lists.freedesktop.org
>> Signed-off-by: Michel Dänzer <michel.daenzer at amd.com>
>> Reviewed-by: Christian König <christian.koenig at amd.com> (v1)
>> ---
>>
>> Christian, does this address your concern? I think making the alignment
>> larger than necessary would be confusing as well.
>>
>>  src/gallium/winsys/radeon/drm/radeon_drm_bo.c | 30 +++++++++++++++++----------
>>  1 file changed, 19 insertions(+), 11 deletions(-)
>>
>> diff --git a/src/gallium/winsys/radeon/drm/radeon_drm_bo.c b/src/gallium/winsys/radeon/drm/radeon_drm_bo.c
>> index 2878c8f..2c36db3 100644
>> --- a/src/gallium/winsys/radeon/drm/radeon_drm_bo.c
>> +++ b/src/gallium/winsys/radeon/drm/radeon_drm_bo.c
>> @@ -76,6 +76,9 @@ struct radeon_bomgr {
>>      bool va;
>>      uint64_t va_offset;
>>      struct list_head va_holes;
>> +
>> +    /* BO size alignment */
>> +    long size_align;
> 
> Any reason to use "long"? It's not like this will ever be greater than
> 2^32. "unsigned" should be enough. Other than that:
> 
> Reviewed-by: Marek Olšák <marek.olsak at amd.com>

Thanks, pushed v3 with your suggestion.


-- 
Earthling Michel Dänzer               |               http://www.amd.com
Libre software enthusiast             |             Mesa and X developer


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