[Mesa-dev] [PATCH] i965: Combine BRW_NEW_*_BINDING_TABLE dirty bits.
Pohjolainen, Topi
topi.pohjolainen at intel.com
Tue Nov 10 23:22:30 PST 2015
On Tue, Nov 10, 2015 at 06:33:44PM -0800, Kenneth Graunke wrote:
> A while back, we moved to directly emitting the Gen7+ state when
> constructing the binding tables. These flags are only used on
> Gen4-6, which emit all the binding table pointers at once.
>
> We gain nothing by having separate flags, so combine them.
>
> Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen at intel.com>
> ---
> src/mesa/drivers/dri/i965/brw_binding_tables.c | 21 ++++++++-------------
> src/mesa/drivers/dri/i965/brw_context.h | 8 ++------
> src/mesa/drivers/dri/i965/brw_state.h | 1 -
> src/mesa/drivers/dri/i965/brw_state_upload.c | 4 +---
> src/mesa/drivers/dri/i965/gen6_sol.c | 6 +++---
> 5 files changed, 14 insertions(+), 26 deletions(-)
>
> diff --git a/src/mesa/drivers/dri/i965/brw_binding_tables.c b/src/mesa/drivers/dri/i965/brw_binding_tables.c
> index 508f1f0..d8226e0 100644
> --- a/src/mesa/drivers/dri/i965/brw_binding_tables.c
> +++ b/src/mesa/drivers/dri/i965/brw_binding_tables.c
> @@ -88,7 +88,6 @@ reserve_hw_bt_space(struct brw_context *brw, unsigned bytes)
> void
> brw_upload_binding_table(struct brw_context *brw,
> uint32_t packet_name,
> - GLbitfield brw_new_binding_table,
> const struct brw_stage_prog_data *prog_data,
> struct brw_stage_state *stage_state)
> {
> @@ -127,7 +126,7 @@ brw_upload_binding_table(struct brw_context *brw,
> }
> }
>
> - brw->ctx.NewDriverState |= brw_new_binding_table;
> + brw->ctx.NewDriverState |= BRW_NEW_BINDING_TABLE_POINTERS;
>
> if (brw->gen >= 7) {
> if (brw->use_resource_streamer) {
> @@ -159,7 +158,7 @@ brw_vs_upload_binding_table(struct brw_context *brw)
> const struct brw_stage_prog_data *prog_data = brw->vs.base.prog_data;
> brw_upload_binding_table(brw,
> _3DSTATE_BINDING_TABLE_POINTERS_VS,
> - BRW_NEW_VS_BINDING_TABLE, prog_data,
> + prog_data,
> &brw->vs.base);
> }
>
> @@ -183,7 +182,7 @@ brw_upload_wm_binding_table(struct brw_context *brw)
> const struct brw_stage_prog_data *prog_data = brw->wm.base.prog_data;
> brw_upload_binding_table(brw,
> _3DSTATE_BINDING_TABLE_POINTERS_PS,
> - BRW_NEW_PS_BINDING_TABLE, prog_data,
> + prog_data,
> &brw->wm.base);
> }
>
> @@ -209,7 +208,7 @@ brw_gs_upload_binding_table(struct brw_context *brw)
> const struct brw_stage_prog_data *prog_data = brw->gs.base.prog_data;
> brw_upload_binding_table(brw,
> _3DSTATE_BINDING_TABLE_POINTERS_GS,
> - BRW_NEW_GS_BINDING_TABLE, prog_data,
> + prog_data,
> &brw->gs.base);
> }
>
> @@ -406,10 +405,8 @@ const struct brw_tracked_state brw_binding_table_pointers = {
> .dirty = {
> .mesa = 0,
> .brw = BRW_NEW_BATCH |
> - BRW_NEW_GS_BINDING_TABLE |
> - BRW_NEW_PS_BINDING_TABLE |
> - BRW_NEW_STATE_BASE_ADDRESS |
> - BRW_NEW_VS_BINDING_TABLE,
> + BRW_NEW_BINDING_TABLE_POINTERS |
> + BRW_NEW_STATE_BASE_ADDRESS,
> },
> .emit = gen4_upload_binding_table_pointers,
> };
> @@ -442,10 +439,8 @@ const struct brw_tracked_state gen6_binding_table_pointers = {
> .dirty = {
> .mesa = 0,
> .brw = BRW_NEW_BATCH |
> - BRW_NEW_GS_BINDING_TABLE |
> - BRW_NEW_PS_BINDING_TABLE |
> - BRW_NEW_STATE_BASE_ADDRESS |
> - BRW_NEW_VS_BINDING_TABLE,
> + BRW_NEW_BINDING_TABLE_POINTERS |
> + BRW_NEW_STATE_BASE_ADDRESS,
> },
> .emit = gen6_upload_binding_table_pointers,
> };
> diff --git a/src/mesa/drivers/dri/i965/brw_context.h b/src/mesa/drivers/dri/i965/brw_context.h
> index c83f47b..4b2db61 100644
> --- a/src/mesa/drivers/dri/i965/brw_context.h
> +++ b/src/mesa/drivers/dri/i965/brw_context.h
> @@ -184,9 +184,7 @@ enum brw_state_id {
> BRW_STATE_CONTEXT,
> BRW_STATE_PSP,
> BRW_STATE_SURFACES,
> - BRW_STATE_VS_BINDING_TABLE,
> - BRW_STATE_GS_BINDING_TABLE,
> - BRW_STATE_PS_BINDING_TABLE,
> + BRW_STATE_BINDING_TABLE_POINTERS,
> BRW_STATE_INDICES,
> BRW_STATE_VERTICES,
> BRW_STATE_BATCH,
> @@ -261,9 +259,7 @@ enum brw_state_id {
> #define BRW_NEW_CONTEXT (1ull << BRW_STATE_CONTEXT)
> #define BRW_NEW_PSP (1ull << BRW_STATE_PSP)
> #define BRW_NEW_SURFACES (1ull << BRW_STATE_SURFACES)
> -#define BRW_NEW_VS_BINDING_TABLE (1ull << BRW_STATE_VS_BINDING_TABLE)
> -#define BRW_NEW_GS_BINDING_TABLE (1ull << BRW_STATE_GS_BINDING_TABLE)
> -#define BRW_NEW_PS_BINDING_TABLE (1ull << BRW_STATE_PS_BINDING_TABLE)
> +#define BRW_NEW_BINDING_TABLE_POINTERS (1ull << BRW_STATE_BINDING_TABLE_POINTERS)
> #define BRW_NEW_INDICES (1ull << BRW_STATE_INDICES)
> #define BRW_NEW_VERTICES (1ull << BRW_STATE_VERTICES)
> /**
> diff --git a/src/mesa/drivers/dri/i965/brw_state.h b/src/mesa/drivers/dri/i965/brw_state.h
> index 2aa1248..94734ba 100644
> --- a/src/mesa/drivers/dri/i965/brw_state.h
> +++ b/src/mesa/drivers/dri/i965/brw_state.h
> @@ -172,7 +172,6 @@ brw_state_dirty(struct brw_context *brw, GLuint mesa_flags, uint64_t brw_flags)
> /* brw_binding_tables.c */
> void brw_upload_binding_table(struct brw_context *brw,
> uint32_t packet_name,
> - GLbitfield brw_new_binding_table,
> const struct brw_stage_prog_data *prog_data,
> struct brw_stage_state *stage_state);
>
> diff --git a/src/mesa/drivers/dri/i965/brw_state_upload.c b/src/mesa/drivers/dri/i965/brw_state_upload.c
> index 0344b8a..6f8daf6 100644
> --- a/src/mesa/drivers/dri/i965/brw_state_upload.c
> +++ b/src/mesa/drivers/dri/i965/brw_state_upload.c
> @@ -589,9 +589,7 @@ static struct dirty_bit_map brw_bits[] = {
> DEFINE_BIT(BRW_NEW_CONTEXT),
> DEFINE_BIT(BRW_NEW_PSP),
> DEFINE_BIT(BRW_NEW_SURFACES),
> - DEFINE_BIT(BRW_NEW_VS_BINDING_TABLE),
> - DEFINE_BIT(BRW_NEW_GS_BINDING_TABLE),
> - DEFINE_BIT(BRW_NEW_PS_BINDING_TABLE),
> + DEFINE_BIT(BRW_NEW_BINDING_TABLE_POINTERS),
> DEFINE_BIT(BRW_NEW_INDICES),
> DEFINE_BIT(BRW_NEW_VERTICES),
> DEFINE_BIT(BRW_NEW_BATCH),
> diff --git a/src/mesa/drivers/dri/i965/gen6_sol.c b/src/mesa/drivers/dri/i965/gen6_sol.c
> index 3899ce9..2f6eadf 100644
> --- a/src/mesa/drivers/dri/i965/gen6_sol.c
> +++ b/src/mesa/drivers/dri/i965/gen6_sol.c
> @@ -131,7 +131,7 @@ brw_gs_upload_binding_table(struct brw_context *brw)
> }
> if (!need_binding_table) {
> if (brw->ff_gs.bind_bo_offset != 0) {
> - brw->ctx.NewDriverState |= BRW_NEW_GS_BINDING_TABLE;
> + brw->ctx.NewDriverState |= BRW_NEW_BINDING_TABLE_POINTERS;
> brw->ff_gs.bind_bo_offset = 0;
> }
> return;
> @@ -162,7 +162,7 @@ brw_gs_upload_binding_table(struct brw_context *brw)
> if (!need_binding_table) {
> if (brw->gs.base.bind_bo_offset != 0) {
> brw->gs.base.bind_bo_offset = 0;
> - brw->ctx.NewDriverState |= BRW_NEW_GS_BINDING_TABLE;
> + brw->ctx.NewDriverState |= BRW_NEW_BINDING_TABLE_POINTERS;
> }
> return;
> }
> @@ -179,7 +179,7 @@ brw_gs_upload_binding_table(struct brw_context *brw)
> BRW_MAX_SURFACES * sizeof(uint32_t));
> }
>
> - brw->ctx.NewDriverState |= BRW_NEW_GS_BINDING_TABLE;
> + brw->ctx.NewDriverState |= BRW_NEW_BINDING_TABLE_POINTERS;
> }
>
> const struct brw_tracked_state gen6_gs_binding_table = {
> --
> 2.6.2
>
> _______________________________________________
> mesa-dev mailing list
> mesa-dev at lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/mesa-dev
More information about the mesa-dev
mailing list