[Mesa-dev] [PATCH 2/2] intel/kbl: Add Kabylake PCI ids

[Sarah Sharp]

From: Rodrigo Vivi <rodrigo.vivi at intel.com>

Also, following kernel definition Kabylake is skylake.

Signed-off-by: Rodrigo Vivi <rodrigo.vivi at intel.com>
Signed-off-by: Sarah Sharp <sarah.a.sharp at linux.intel.com>
---

 intel/intel_chipset.h | 57 ++++++++++++++++++++++++++++++++++++++++++++++++++-
 1 file changed, 56 insertions(+), 1 deletion(-)

diff --git a/intel/intel_chipset.h b/intel/intel_chipset.h
index 253ea71..4bbad5c 100644
--- a/intel/intel_chipset.h
+++ b/intel/intel_chipset.h
@@ -181,6 +181,29 @@
 #define PCI_CHIP_SKYLAKE_SRV_GT1	0x190A
 #define PCI_CHIP_SKYLAKE_WKS_GT2 	0x191D
 
+#define PCI_CHIP_KABYLAKE_ULT_GT2	0x5916
+#define PCI_CHIP_KABYLAKE_ULT_GT1_5	0x5913
+#define PCI_CHIP_KABYLAKE_ULT_GT1	0x5906
+#define PCI_CHIP_KABYLAKE_ULT_GT3	0x5926
+#define PCI_CHIP_KABYLAKE_ULT_GT2F	0x5921
+#define PCI_CHIP_KABYLAKE_ULX_GT1_5	0x5915
+#define PCI_CHIP_KABYLAKE_ULX_GT1	0x590E
+#define PCI_CHIP_KABYLAKE_ULX_GT2	0x591E
+#define PCI_CHIP_KABYLAKE_DT_GT2	0x5912
+#define PCI_CHIP_KABYLAKE_DT_GT1_5	0x5917
+#define PCI_CHIP_KABYLAKE_DT_GT1	0x5902
+#define PCI_CHIP_KABYLAKE_DT_GT4	0x5932
+#define PCI_CHIP_KABYLAKE_HALO_GT2	0x591B
+#define PCI_CHIP_KABYLAKE_HALO_GT4	0x593B
+#define PCI_CHIP_KABYLAKE_HALO_GT3	0x592B
+#define PCI_CHIP_KABYLAKE_HALO_GT1	0x590B
+#define PCI_CHIP_KABYLAKE_SRV_GT2	0x591A
+#define PCI_CHIP_KABYLAKE_SRV_GT3	0x592A
+#define PCI_CHIP_KABYLAKE_SRV_GT1	0x590A
+#define PCI_CHIP_KABYLAKE_SRV_GT4	0x593A
+#define PCI_CHIP_KABYLAKE_WKS_GT2	0x591D
+#define PCI_CHIP_KABYLAKE_WKS_GT4	0x593D
+
 #define PCI_CHIP_BROXTON_0		0x0A84
 #define PCI_CHIP_BROXTON_1		0x1A84
 #define PCI_CHIP_BROXTON_2		0x5A84
@@ -362,6 +385,37 @@
 				 (devid) == PCI_CHIP_SKYLAKE_HALO_GT3	|| \
 				 (devid) == PCI_CHIP_SKYLAKE_SRV_GT3)
 
+#define IS_KBL_GT1(devid)	((devid) == PCI_CHIP_KABYLAKE_ULT_GT1_5	|| \
+				 (devid) == PCI_CHIP_KABYLAKE_ULX_GT1_5	|| \
+				 (devid) == PCI_CHIP_KABYLAKE_DT_GT1_5	|| \
+				 (devid) == PCI_CHIP_KABYLAKE_ULT_GT1	|| \
+				 (devid) == PCI_CHIP_KABYLAKE_ULX_GT1	|| \
+				 (devid) == PCI_CHIP_KABYLAKE_DT_GT1	|| \
+				 (devid) == PCI_CHIP_KABYLAKE_HALO_GT1	|| \
+				 (devid) == PCI_CHIP_KABYLAKE_SRV_GT1)
+
+#define IS_KBL_GT2(devid)	((devid) == PCI_CHIP_KABYLAKE_ULT_GT2	|| \
+				 (devid) == PCI_CHIP_KABYLAKE_ULT_GT2F	|| \
+				 (devid) == PCI_CHIP_KABYLAKE_ULX_GT2	|| \
+				 (devid) == PCI_CHIP_KABYLAKE_DT_GT2	|| \
+				 (devid) == PCI_CHIP_KABYLAKE_HALO_GT2	|| \
+				 (devid) == PCI_CHIP_KABYLAKE_SRV_GT2	|| \
+				 (devid) == PCI_CHIP_KABYLAKE_WKS_GT2)
+
+#define IS_KBL_GT3(devid)	((devid) == PCI_CHIP_KABYLAKE_ULT_GT3	|| \
+				 (devid) == PCI_CHIP_KABYLAKE_HALO_GT3	|| \
+				 (devid) == PCI_CHIP_KABYLAKE_SRV_GT3)
+
+#define IS_KBL_GT4(devid)	((devid) == PCI_CHIP_KABYLAKE_DT_GT4	|| \
+				 (devid) == PCI_CHIP_KABYLAKE_HALO_GT4	|| \
+				 (devid) == PCI_CHIP_KABYLAKE_SRV_GT4	|| \
+				 (devid) == PCI_CHIP_KABYLAKE_WKS_GT4)
+
+#define IS_KABYLAKE(devid)	(IS_KBL_GT1(devid) || \
+				 IS_KBL_GT2(devid) || \
+				 IS_KBL_GT3(devid) || \
+				 IS_KBL_GT4(devid))
+
 #define IS_SKYLAKE(devid)	(IS_SKL_GT1(devid) || \
 				 IS_SKL_GT2(devid) || \
 				 IS_SKL_GT3(devid))
@@ -371,7 +425,8 @@
 				 (devid) == PCI_CHIP_BROXTON_2)
 
 #define IS_GEN9(devid)		(IS_SKYLAKE(devid) || \
-				 IS_BROXTON(devid))
+				 IS_BROXTON(devid) || \
+				 IS_KABYLAKE(devid))
 
 #define IS_9XX(dev)		(IS_GEN3(dev) || \
 				 IS_GEN4(dev) || \
-- 
2.3.0