[Mesa-dev] [PATCH 2/2] intel/kbl: Add Kabylake PCI ids

[Ben Widawsky]

I don't know what the accepted solution is, but generally libdrm patches should
go to dri-devel at lists.freedesktop.org. Since not everyone reads dri-devel
regularly I usually send to both lists. I don't know if it matters much anymore.

On Mon, Nov 16, 2015 at 04:25:12PM -0800, Sarah Sharp wrote:
> From: Rodrigo Vivi <rodrigo.vivi at intel.com>
> 
> Also, following kernel definition Kabylake is skylake.
> 
> Signed-off-by: Rodrigo Vivi <rodrigo.vivi at intel.com>
> Signed-off-by: Sarah Sharp <sarah.a.sharp at linux.intel.com>
> ---
> 
>  intel/intel_chipset.h | 57 ++++++++++++++++++++++++++++++++++++++++++++++++++-
>  1 file changed, 56 insertions(+), 1 deletion(-)
> 
> diff --git a/intel/intel_chipset.h b/intel/intel_chipset.h
> index 253ea71..4bbad5c 100644
> --- a/intel/intel_chipset.h
> +++ b/intel/intel_chipset.h
> @@ -181,6 +181,29 @@
>  #define PCI_CHIP_SKYLAKE_SRV_GT1	0x190A
>  #define PCI_CHIP_SKYLAKE_WKS_GT2 	0x191D
>  
> +#define PCI_CHIP_KABYLAKE_ULT_GT2	0x5916
> +#define PCI_CHIP_KABYLAKE_ULT_GT1_5	0x5913
> +#define PCI_CHIP_KABYLAKE_ULT_GT1	0x5906
> +#define PCI_CHIP_KABYLAKE_ULT_GT3	0x5926
> +#define PCI_CHIP_KABYLAKE_ULT_GT2F	0x5921
> +#define PCI_CHIP_KABYLAKE_ULX_GT1_5	0x5915
> +#define PCI_CHIP_KABYLAKE_ULX_GT1	0x590E
> +#define PCI_CHIP_KABYLAKE_ULX_GT2	0x591E
> +#define PCI_CHIP_KABYLAKE_DT_GT2	0x5912

Sweet, the docs have 2 different definitions for 5912. Fantastic.

> +#define PCI_CHIP_KABYLAKE_DT_GT1_5	0x5917
> +#define PCI_CHIP_KABYLAKE_DT_GT1	0x5902
> +#define PCI_CHIP_KABYLAKE_DT_GT4	0x5932
> +#define PCI_CHIP_KABYLAKE_HALO_GT2	0x591B

Again. My goodness, brand strings are going to be a pain.

> +#define PCI_CHIP_KABYLAKE_HALO_GT4	0x593B
> +#define PCI_CHIP_KABYLAKE_HALO_GT3	0x592B
> +#define PCI_CHIP_KABYLAKE_HALO_GT1	0x590B
> +#define PCI_CHIP_KABYLAKE_SRV_GT2	0x591A

Another one.

> +#define PCI_CHIP_KABYLAKE_SRV_GT3	0x592A
> +#define PCI_CHIP_KABYLAKE_SRV_GT1	0x590A
> +#define PCI_CHIP_KABYLAKE_SRV_GT4	0x593A
> +#define PCI_CHIP_KABYLAKE_WKS_GT2	0x591D
> +#define PCI_CHIP_KABYLAKE_WKS_GT4	0x593D
> +

I suppose given all the duplicates, it might be nice to add comments, but
honestly, nobody really cares about this level of detail in libdrm - and I
missed this when reviewing the mesa patch.

>  #define PCI_CHIP_BROXTON_0		0x0A84
>  #define PCI_CHIP_BROXTON_1		0x1A84
>  #define PCI_CHIP_BROXTON_2		0x5A84
> @@ -362,6 +385,37 @@
>  				 (devid) == PCI_CHIP_SKYLAKE_HALO_GT3	|| \
>  				 (devid) == PCI_CHIP_SKYLAKE_SRV_GT3)
>  
> +#define IS_KBL_GT1(devid)	((devid) == PCI_CHIP_KABYLAKE_ULT_GT1_5	|| \
> +				 (devid) == PCI_CHIP_KABYLAKE_ULX_GT1_5	|| \
> +				 (devid) == PCI_CHIP_KABYLAKE_DT_GT1_5	|| \
> +				 (devid) == PCI_CHIP_KABYLAKE_ULT_GT1	|| \
> +				 (devid) == PCI_CHIP_KABYLAKE_ULX_GT1	|| \
> +				 (devid) == PCI_CHIP_KABYLAKE_DT_GT1	|| \
> +				 (devid) == PCI_CHIP_KABYLAKE_HALO_GT1	|| \
> +				 (devid) == PCI_CHIP_KABYLAKE_SRV_GT1)
> +
> +#define IS_KBL_GT2(devid)	((devid) == PCI_CHIP_KABYLAKE_ULT_GT2	|| \
> +				 (devid) == PCI_CHIP_KABYLAKE_ULT_GT2F	|| \
> +				 (devid) == PCI_CHIP_KABYLAKE_ULX_GT2	|| \
> +				 (devid) == PCI_CHIP_KABYLAKE_DT_GT2	|| \
> +				 (devid) == PCI_CHIP_KABYLAKE_HALO_GT2	|| \
> +				 (devid) == PCI_CHIP_KABYLAKE_SRV_GT2	|| \
> +				 (devid) == PCI_CHIP_KABYLAKE_WKS_GT2)
> +
> +#define IS_KBL_GT3(devid)	((devid) == PCI_CHIP_KABYLAKE_ULT_GT3	|| \
> +				 (devid) == PCI_CHIP_KABYLAKE_HALO_GT3	|| \
> +				 (devid) == PCI_CHIP_KABYLAKE_SRV_GT3)
> +
> +#define IS_KBL_GT4(devid)	((devid) == PCI_CHIP_KABYLAKE_DT_GT4	|| \
> +				 (devid) == PCI_CHIP_KABYLAKE_HALO_GT4	|| \
> +				 (devid) == PCI_CHIP_KABYLAKE_SRV_GT4	|| \
> +				 (devid) == PCI_CHIP_KABYLAKE_WKS_GT4)
> +
> +#define IS_KABYLAKE(devid)	(IS_KBL_GT1(devid) || \
> +				 IS_KBL_GT2(devid) || \
> +				 IS_KBL_GT3(devid) || \
> +				 IS_KBL_GT4(devid))
> +

The actual correct breakdown IMO (and the encoding going back to bdw) is nibble
#1 represents the GT#.

ie
590x = gt1
591x = gt2
592x = gt3
593x = gt4

This doesn't match how it's done here (the fuse parts are rounded down instead
of up, like gt 1.5), but it's up to you.

Reviewed-by: Ben Widawsky <benjamin.widawsky at intel.com>

>  #define IS_SKYLAKE(devid)	(IS_SKL_GT1(devid) || \
>  				 IS_SKL_GT2(devid) || \
>  				 IS_SKL_GT3(devid))
> @@ -371,7 +425,8 @@
>  				 (devid) == PCI_CHIP_BROXTON_2)
>  
>  #define IS_GEN9(devid)		(IS_SKYLAKE(devid) || \
> -				 IS_BROXTON(devid))
> +				 IS_BROXTON(devid) || \
> +				 IS_KABYLAKE(devid))
>  
>  #define IS_9XX(dev)		(IS_GEN3(dev) || \
>  				 IS_GEN4(dev) || \
> -- 
> 2.3.0
> 

-- 
Ben Widawsky, Intel Open Source Technology Center