[Mesa-dev] [PATCH v2] i915/aa: fixing anti-aliasing bug for thinnest width lines
Predut, Marius
marius.predut at intel.com
Mon Oct 5 08:50:45 PDT 2015
> -----Original Message-----
> From: mesa-dev [mailto:mesa-dev-bounces at lists.freedesktop.org] On Behalf Of
> Ian Romanick
> Sent: Wednesday, September 09, 2015 9:11 PM
> To: Predut, Marius; mesa-dev at lists.freedesktop.org
> Subject: Re: [Mesa-dev] [PATCH v2] i915/aa: fixing anti-aliasing bug for
> thinnest width lines
>
> On 09/09/2015 06:59 AM, Marius Predut wrote:
> > On PNV platform, for 1 pixel line thickness or less,
> > the general anti-aliasing algorithm gives up, and a garbage line is
> generated.
> > Setting a Line Width of 0.0 specifies the rasterization
> > of the "thinnest" (one-pixel-wide), non-antialiased lines.
> > Lines rendered with zero Line Width are rasterized using
> > Grid Intersection Quantization rules as specified by bspec G45: Volume 2:
> 3D/Media,
> > 7.3.13.1 Zero-Width (Cosmetic) Line Rasterization section.
> >
> > This patch follow the same rules as patches fixing the
> > https://bugs.freedesktop.org/show_bug.cgi?id=28832
> > bug.
> >
> > v1: Eduardo Lima Mitev: Wrong indentation inside the if clause.
> >
> > Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=90367
> >
> > Signed-off-by: Marius Predut <marius.predut at intel.com>
> > ---
> > src/mesa/drivers/dri/i915/i915_state.c | 15 +++++++++++++++
> > 1 file changed, 15 insertions(+)
> >
> > diff --git a/src/mesa/drivers/dri/i915/i915_state.c
> b/src/mesa/drivers/dri/i915/i915_state.c
> > index 4c83073..ebb4e9a 100644
> > --- a/src/mesa/drivers/dri/i915/i915_state.c
> > +++ b/src/mesa/drivers/dri/i915/i915_state.c
> > @@ -599,6 +599,21 @@ i915LineWidth(struct gl_context * ctx, GLfloat widthf)
> >
> > width = (int) (widthf * 2);
> > width = CLAMP(width, 1, 0xf);
> > +
> > + if (ctx->Line.Width < 1.5 || widthf < 1.5) {
> > + /* For 1 pixel line thickness or less, the general
> > + * anti-aliasing algorithm gives up, and a garbage line is
> > + * generated. Setting a Line Width of 0.0 specifies the
> > + * rasterization of the "thinnest" (one-pixel-wide),
> > + * non-antialiased lines.
> > + *
> > + * Lines rendered with zero Line Width are rasterized using
> > + * Grid Intersection Quantization rules as specified by
> > + * bspec G45: Volume 2: 3D/Media,
>
> Eh... Isn't G45 actually i965-class hardware? GEN4.5, right? I don't
> see how a GEN4 bspec reference is useful (or correct?) in the GEN3
> driver. I think you want "2.8.4.1 Zero-Width (Cosmetic) Line
> Rasterization" from volume 1f of the GEN3 docs.
I used this reference specs because I was unable to find dedicated specs for gen 3.
Send v2 patch.
>
> I looked at section 2.8.4.3 Anti-aliased Line Rasterization of volume 1f
> of the GEN3 docs that I have. I don't see any mention of this
> restriction. Is it documented anywhere?
my knowledge says no
>
> It also seems like this will affect non-antialised wide lines. Is that
> correct?
Yes, for Line.Width < 1.5,
But seems this is the normal behavior.(for width = 0 , antialiased is disabled)
>
> > + * 7.3.13.1 Zero-Width (Cosmetic) Line Rasterization section
> > + */
> > + width = 0;
> > + }
> > lis4 |= width << S4_LINE_WIDTH_SHIFT;
> >
> > if (lis4 != i915->state.Ctx[I915_CTXREG_LIS4]) {
>
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