[Mesa-dev] [PATCH 5/6] i965: Implement nir_intrinsic_shader_clock
Emil Velikov
emil.l.velikov at gmail.com
Wed Oct 7 04:51:56 PDT 2015
Signed-off-by: Emil Velikov <emil.velikov at collabora.com>
---
src/mesa/drivers/dri/i965/brw_fs_nir.cpp | 9 +++++++++
src/mesa/drivers/dri/i965/brw_vec4_nir.cpp | 10 ++++++++++
2 files changed, 19 insertions(+)
diff --git a/src/mesa/drivers/dri/i965/brw_fs_nir.cpp b/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
index 03fe680..bcb8f38 100644
--- a/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
@@ -1317,6 +1317,15 @@ fs_visitor::nir_emit_intrinsic(const fs_builder &bld, nir_intrinsic_instr *instr
break;
}
+ case nir_intrinsic_shader_clock: {
+ /* We cannot do anything if there is an event, so ignore it for now */
+ fs_reg shader_clock = get_timestamp(bld);
+
+ bld.MOV(retype(dest, brw_type_for_base_type(glsl_type::uvec2_type)),
+ shader_clock);
+ break;
+ }
+
case nir_intrinsic_image_size: {
/* Get the referenced image variable and type. */
const nir_variable *var = instr->variables[0]->var;
diff --git a/src/mesa/drivers/dri/i965/brw_vec4_nir.cpp b/src/mesa/drivers/dri/i965/brw_vec4_nir.cpp
index 41bd80d..f1de8d4 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4_nir.cpp
+++ b/src/mesa/drivers/dri/i965/brw_vec4_nir.cpp
@@ -806,6 +806,16 @@ vec4_visitor::nir_emit_intrinsic(nir_intrinsic_instr *instr)
break;
}
+ case nir_intrinsic_shader_clock: {
+ /* We cannot do anything if there is an event, so ignore it for now */
+ src_reg shader_clock = get_timestamp();
+ enum brw_reg_type type = brw_type_for_base_type(glsl_type::uvec2_type);
+
+ dest = get_nir_dest(instr->dest, type);
+ emit(MOV(dest, retype(shader_clock, type)));
+ break;
+ }
+
default:
unreachable("Unknown intrinsic");
}
--
2.5.0
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