[Mesa-dev] New stable-branch 11.0 candidate pushed

Thu Oct 8 02:50:11 PDT 2015

Hello list,

The candidate for the Mesa 11.0.3 is now available. Currently we have:
 - 46 queued
 - 18 nominated (outstanding)
 - and 7 rejected/obsolete patches

This time around we have a bunch of EGL patches, mangledGL build fixes
and a healthy amount of driver bugfixes - radeonsi, nouveau, i915 and i965.

Take a look at section "Mesa stable queue" for more information.

Testing
-------
The following results are against piglit 4b6848c131c.

Changes - classic i965(snb)
---------------------------
None.

Changes - swrast classic
------------------------
None.

Changes - gallium softpipe
--------------------------
None.

Changes - gallium llvmpipe (LLVM 3.6.2)
---------------------------------------
None.

Testing reports/general approval
--------------------------------
Any testing reports (or general approval of the state of the branch)
will be greatly appreciated.

Trivial merge conflicts
-----------------------
commit 4e0ae01588492775169b73530210cd131ac99978
Author: Marek Olšák <marek.olsak at amd.com>

    radeonsi: skip drawing if GS ring allocations fail

    (cherry picked from commit 263f5a2cf97e455e48dbd7728cb0ac10fd699746)

commit 33ed153214c67e9a00db90c1f37e1d7756916fed
Author: Marek Olšák <marek.olsak at amd.com>

    radeonsi: skip drawing if the tess factor ring allocation fails

    (cherry picked from commit 22d3ccf5a814bfc768e373d0c983a356f4e4efe3)

The plan is to have 11.0.3 this Friday (9th of October) or shortly after.

If you have any questions or comments that you would like to share
before the release, please go ahead.

Cheers,
Emil

Mesa stable queue
-----------------

Nominated (18)
==============

Alejandro Piñeiro (2):
      i965/vec4: check writemask when bailing out at register coalesce
      i965/vec4: fill src_reg type using the constructor type parameter

Boyan Ding (1):
      i915: Add XRGB8888 format to intel_screen_make_configs

Brian Paul (1):
      configure: don't try to build gallium DRI drivers if --disable-dri is set

Emil Velikov (2):
      i965: store reference to the context within struct brw_fence
      egl/dri2: expose srgb configs when KHR_gl_colorspace is available

Francisco Jerez (5):
      i965: Don't tell the hardware about our UAV access.
      mesa: Expose function to calculate whether a shader image unit is valid.
      mesa: Skip redundant texture completeness checking during image validation.
      i965: Use _mesa_is_image_unit_valid() instead of gl_image_unit::_Valid.
      mesa: Get rid of texture-dependent image unit derived state.

Ian Romanick (1):
      glsl: Restrict initializers for global variables to constant expression in ES

Jason Ekstrand (1):
      mesa: Correctly handle GL_BGRA_EXT in ES3 format_and_type checks

Jean-Sébastien Pédron (1):
      ralloc: Use __attribute__((destructor)) instead of atexit(3)

Tom Stellard (4):
      clover: Call clBuildProgram() notification function when build completes v2
      gallium/drivers: Add threadsafe wrappers for pipe_context v2
      clover: Use threadsafe wrappers for pipe_context v2
      clover: Properly initialize LLVM targets when linking with component libs

Queued (46)
===========

Brian Paul (1):
      st/mesa: try PIPE_BIND_RENDER_TARGET when choosing float texture formats

Daniel Scharrer (1):
      mesa: Add abs input modifier to base for POW in ffvertex_prog

Emil Velikov (1):
      docs: add sha256 checksums for 11.0.2

Francisco Jerez (1):
      i965/fs: Fix hang on IVB and VLV with image format mismatch.

Ian Romanick (1):
      meta: Handle array textures in scaled MSAA blits

Ilia Mirkin (6):
      nouveau: be more careful about freeing temporary transfer buffers
      nouveau: delay deleting buffer with unflushed fence
      nouveau: wait to unref the transfer's bo until it's no longer used
      nv30: pretend to have packed texture/surface formats
      nv30: always go through translate module on big-endian
      nouveau: make sure there's always room to emit a fence

Kyle Brenneman (3):
      glx: Fix build errors with --enable-mangling (v2)
      mapi: Make _glapi_get_stub work with "gl" or "mgl" prefix.
      glx: Don't hard-code the name "libGL.so.1" in driOpenDriver (v3)

Leo Liu (1):
      radeon/vce: fix vui time_scale zero error

Marek Olšák (21):
      st/mesa: fix front buffer regression after dropping st_validate_state in Blit
      radeonsi: handle index buffer alloc failures
      radeonsi: handle constant buffer alloc failures
      gallium/radeon: handle buffer_map staging buffer failures better
      gallium/radeon: handle buffer alloc failures in r600_draw_rectangle
      gallium/radeon: add a fail path for depth MSAA texture readback
      radeonsi: report alloc failure from si_shader_binary_read
      radeonsi: add malloc fail paths to si_create_shader_state
      radeonsi: skip drawing if the tess factor ring allocation fails
      radeonsi: skip drawing if GS ring allocations fail
      radeonsi: handle shader precompile failures
      radeonsi: handle fixed-func TCS shader create failure
      radeonsi: skip drawing if VS, TCS, TES, GS fail to compile or upload
      radeonsi: skip drawing if PS fails to compile or upload
      radeonsi: skip drawing if updating the scratch buffer fails
      radeonsi: don't forget to update scratch relocations for LS, HS, ES shaders
      radeonsi: handle dummy constant buffer allocation failure
      gallium/u_blitter: handle allocation failures
      radeonsi: add scratch buffer to the buffer list when it's re-allocated
      st/dri: don't use _ctx in client_wait_sync
      egl/dri2: don't require a context for ClientWaitSync (v2)

Matthew Waters (1):
      egl: rework handling EGL_CONTEXT_FLAGS

Michel Dänzer (1):
      st/dri: Use packed RGB formats

Roland Scheidegger (1):
      mesa: fix mipmap generation for immutable, compressed textures

Tom Stellard (3):
      gallium/radeon: Use call_once() when initailizing LLVM targets
      gallivm: Allow drivers and state trackers to initialize gallivm LLVM targets v2
      radeon/llvm: Initialize gallivm targets when initializing the AMDGPU target v2

Varad Gautam (1):
      egl: restore surface type before linking config to its display

Ville Syrjälä (3):
      i830: Fix collision between I830_UPLOAD_RASTER_RULES and I830_UPLOAD_TEX(0)
      i915: Fix texcoord vs. varying collision in fragment programs
      i915: Remember to call intel_prepare_render() before blitting

Obsolete (3)
============

Anuj Phogat (1):
      i965: Abort tiled_memcpy path for TexSubImage in case of transfer operations

Ben Widawsky (2):
      Revert "i965: Stop aux data compare preventing program binary re-use"
      i965/skl: Use larger URB size where available.

Rejected (4)
============

Benjamin Bellec (2):
      gallium/hud: temperature is displayed with a percentage symbol, remove it
      gallium/hud: display the Celsius temperature unit

Rob Clark (1):
      xa: add xa_surface_from_handle2

Varad Gautam (1):
      egl: move memcpy to bring conf->base operations together