[Mesa-dev] [PATCH v2 3/7] radeonsi: Add a CACHE_FLUSH event

[Bas Nieuwenhuizen]

Needed for various DCC related operations. As invalidating the L2
cache seems unnecesary, this introduces a new flag to flush the cache
without invalidating the L2 cache.

Signed-off-by: Bas Nieuwenhuizen <bas at basnieuwenhuizen.nl>
---
 src/gallium/drivers/radeonsi/si_pipe.h       | 1 +
 src/gallium/drivers/radeonsi/si_state_draw.c | 3 +++
 2 files changed, 4 insertions(+)

diff --git a/src/gallium/drivers/radeonsi/si_pipe.h b/src/gallium/drivers/radeonsi/si_pipe.h
index 2abd5b5..b43c027 100644
--- a/src/gallium/drivers/radeonsi/si_pipe.h
+++ b/src/gallium/drivers/radeonsi/si_pipe.h
@@ -68,6 +68,7 @@
 /* Compute only. */
 #define SI_CONTEXT_FLUSH_WITH_INV_L2	(R600_CONTEXT_PRIVATE_FLAG << 13) /* TODO: merge with TC? */
 #define SI_CONTEXT_FLAG_COMPUTE		(R600_CONTEXT_PRIVATE_FLAG << 14)
+#define SI_CONTEXT_FLUSH		(R600_CONTEXT_PRIVATE_FLAG << 15)
 
 #define SI_CONTEXT_FLUSH_AND_INV_FRAMEBUFFER (SI_CONTEXT_FLUSH_AND_INV_CB | \
 					      SI_CONTEXT_FLUSH_AND_INV_CB_META | \
diff --git a/src/gallium/drivers/radeonsi/si_state_draw.c b/src/gallium/drivers/radeonsi/si_state_draw.c
index 5face42..c42d7cd 100644
--- a/src/gallium/drivers/radeonsi/si_state_draw.c
+++ b/src/gallium/drivers/radeonsi/si_state_draw.c
@@ -654,6 +654,9 @@ void si_emit_cache_flush(struct si_context *si_ctx, struct r600_atom *atom)
 		radeon_emit(cs, PKT3(PKT3_EVENT_WRITE, 0, 0) | compute);
 		radeon_emit(cs, EVENT_TYPE(EVENT_TYPE_CACHE_FLUSH) | EVENT_INDEX(7) |
 				EVENT_WRITE_INV_L2);
+        } else if (sctx->flags & SI_CONTEXT_FLUSH) {
+		radeon_emit(cs, PKT3(PKT3_EVENT_WRITE, 0, 0) | compute);
+		radeon_emit(cs, EVENT_TYPE(EVENT_TYPE_CACHE_FLUSH) | EVENT_INDEX(7));
         }
 
 	/* FLUSH_AND_INV events must be emitted before PS_PARTIAL_FLUSH.
-- 
2.5.3