[Mesa-dev] [PATCH 00/10] Support Skylake MCS buffers (fast clears)
benjamin.widawsky at intel.com
Tue Oct 13 20:50:17 PDT 2015
This patch series adds support for fast color clears on SKL as it exists on
previous generations of hardware minus the new hardware restriction on surface
formats. Additionally, it adds support for utilizing clear values with up to 32b
per color channel (see note at the bottom). It is based on work originally done
by Kristian, so thanks to him for that initial work as well as helping me debug
some of the issues.
Additionally, thanks to Chad for helping track down the last bug in the rectangle
scaling code which was (for me) being masked by another bug (#3 below). I
imagine it would have been several more weeks at least before I uncovered it.
We knew that SKL added the extra DWORDs to the RENDER_SURFACE_STATE in order to
support the 32b per channel. As it turned out though, Skylake made other changes
to support this which caused weird failures which seemed to interfere with
1. Not all surface formats support lossless compression.
2. Clearing multiple color buffer attachments must happen in n passes
3. Change to the scaling factors for the MCS surface - SKL has 2x height (this
was the bug which Chad helped uncover, I had it correct in my patch from March
http://lists.freedesktop.org/archives/mesa-dev/2015-March/079084.html, but we
had other problems which prevented merge, including #1 and #2 above).
I have no piglit, dEQP or CTS regressions (except for the last patch). I haven't
yet, but will collect perf data on this ASAP. Historically we've come to expect
this to provide large gains in tests which are memory bandwidth limited and
doing many clears.
Ben Widawsky (10):
i965/gen8+: Remove redundant zeroing of surface state
i965/gen8+: Extract color clear surface state
i965/skl: Enable fast color clears on SKL
i965/skl: skip fast clears for certain surface formats
i965/meta/gen9: Individually fast clear color attachments
Revert "i965/gen9: Disable MCS for 1x color surfaces"
Revert "i965/gen9: Enable rep clears on gen9"
i965/meta: Assert fast clears and rep clears never overlap
i965/meta: Remove fast_clear_color variable
i965/gen9: Support fast clears for 32b float
src/mesa/drivers/dri/i965/brw_context.h | 1 +
src/mesa/drivers/dri/i965/brw_meta_fast_clear.c | 172 ++++++++++++++++++------
src/mesa/drivers/dri/i965/brw_surface_formats.c | 27 ++++
src/mesa/drivers/dri/i965/gen8_surface_state.c | 48 ++++---
src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 20 +--
src/mesa/drivers/dri/i965/intel_mipmap_tree.h | 7 +-
6 files changed, 205 insertions(+), 70 deletions(-)
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