[Mesa-dev] [PATCH 1/3] i965: Don't use message headers for typed/untyped reads

Iago Toral itoral at igalia.com
Mon Oct 19 02:37:43 PDT 2015


On Sun, 2015-10-18 at 21:31 -0700, Kristian Høgsberg Kristensen wrote:
> We always set the mask to 0xffff, which is what it defaults to when no
> header is present. Let's drop the header instead.

Right, according to the PRM (3.9.9 Typed/Untyped Surface Read/Write and
Typed/Untyped Atomic Operation):

"SIMD16: The 16 bits of the execution mask are ANDed with the 16 bits of
the Pixel/Sample Mask from the message header and the resulting mask is
used to determine which slots are read into the destination GRF register
(for read), or which slots are written to the surface (for write). If
the header is not present, only the execution mask is used."

Similar text exists for SIMD8 and SIMD4x2 is not affected by Sample
mask.

Reviewed-by: Iago Toral Quiroga <itoral at igalia.com>

> Signed-off-by: Kristian Høgsberg Kristensen <krh at bitplanet.net>
> ---
>  src/mesa/drivers/dri/i965/brw_eu_emit.c | 3 +--
>  src/mesa/drivers/dri/i965/brw_fs.cpp    | 4 ++--
>  2 files changed, 3 insertions(+), 4 deletions(-)
> 
> diff --git a/src/mesa/drivers/dri/i965/brw_eu_emit.c b/src/mesa/drivers/dri/i965/brw_eu_emit.c
> index bf2fee9..ebd811f 100644
> --- a/src/mesa/drivers/dri/i965/brw_eu_emit.c
> +++ b/src/mesa/drivers/dri/i965/brw_eu_emit.c
> @@ -2906,11 +2906,10 @@ brw_untyped_surface_read(struct brw_codegen *p,
>     const unsigned sfid = (devinfo->gen >= 8 || devinfo->is_haswell ?
>                            HSW_SFID_DATAPORT_DATA_CACHE_1 :
>                            GEN7_SFID_DATAPORT_DATA_CACHE);
> -   const bool align1 = (brw_inst_access_mode(devinfo, p->current) == BRW_ALIGN_1);
>     struct brw_inst *insn = brw_send_indirect_surface_message(
>        p, sfid, dst, payload, surface, msg_length,
>        brw_surface_payload_size(p, num_channels, true, true),
> -      align1);
> +      false);
>  
>     brw_set_dp_untyped_surface_read_message(
>        p, insn, num_channels);
> diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp b/src/mesa/drivers/dri/i965/brw_fs.cpp
> index a2fd441..457bf59 100644
> --- a/src/mesa/drivers/dri/i965/brw_fs.cpp
> +++ b/src/mesa/drivers/dri/i965/brw_fs.cpp
> @@ -4032,7 +4032,7 @@ fs_visitor::lower_logical_sends()
>        case SHADER_OPCODE_UNTYPED_SURFACE_READ_LOGICAL:
>           lower_surface_logical_send(ibld, inst,
>                                      SHADER_OPCODE_UNTYPED_SURFACE_READ,
> -                                    fs_reg(0xffff));
> +                                    fs_reg());
>           break;
>  
>        case SHADER_OPCODE_UNTYPED_SURFACE_WRITE_LOGICAL:
> @@ -4050,7 +4050,7 @@ fs_visitor::lower_logical_sends()
>        case SHADER_OPCODE_TYPED_SURFACE_READ_LOGICAL:
>           lower_surface_logical_send(ibld, inst,
>                                      SHADER_OPCODE_TYPED_SURFACE_READ,
> -                                    fs_reg(0xffff));
> +                                    fs_reg());
>           break;
>  
>        case SHADER_OPCODE_TYPED_SURFACE_WRITE_LOGICAL:




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