[Mesa-dev] [RFCv0 7/8] freedreno/ir3: fix const_index handling for uniforms

[Rob Clark]

When coming directly from glsl_to_nir (rather than via TGSI where
information about, for example, mat4's is lost), both const_index
fields will be used (vs. tgsi_to_nir where the 2nd is always zero).

For example:

  decl_var uniform INTERP_QUALIFIER_NONE mat4 ModelViewProjectionMatrix (0, 0)
  decl_var uniform INTERP_QUALIFIER_NONE mat4 NormalMatrix (4, 4)
  ...
	vec4 ssa_54 = intrinsic load_uniform () () (4, 0)	/* NormalMatrix */
	vec4 ssa_56 = intrinsic load_uniform () () (4, 1)	/* NormalMatrix */

vs:

  decl_var uniform INTERP_QUALIFIER_NONE vec4[8] uniform_0 (0, 0)
  ...
	vec4 ssa_54 = intrinsic load_uniform () () (4, 0)
	vec4 ssa_56 = intrinsic load_uniform () () (5, 0)
---
 src/gallium/drivers/freedreno/ir3/ir3_compiler_nir.c | 5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/src/gallium/drivers/freedreno/ir3/ir3_compiler_nir.c b/src/gallium/drivers/freedreno/ir3/ir3_compiler_nir.c
index 5a53e32..2b9a841 100644
--- a/src/gallium/drivers/freedreno/ir3/ir3_compiler_nir.c
+++ b/src/gallium/drivers/freedreno/ir3/ir3_compiler_nir.c
@@ -1377,7 +1377,10 @@ emit_intrinisic(struct ir3_compile *ctx, nir_intrinsic_instr *intr)
 	const nir_intrinsic_info *info = &nir_intrinsic_infos[intr->intrinsic];
 	struct ir3_instruction **dst, **src;
 	struct ir3_block *b = ctx->block;
-	unsigned idx = intr->const_index[0];
+	unsigned idx = 0;
+
+	for (unsigned i = 0; i < nir_intrinsic_infos[intr->intrinsic].num_indices; i++)
+		idx += intr->const_index[i];
 
 	if (info->has_dest) {
 		dst = get_dst(ctx, &intr->dest, intr->num_components);
-- 
2.5.0