[Mesa-dev] [PATCH 2/2] i965: Use the ssbo load cache optimization

[Iago Toral Quiroga]

We only really want to do this once since no passes other than
lower_ubo_reference can inject ssbo loads in the IR. We want to
run this late after other optimizations have kicked in to maximize
the chances of seeing constants for block and offset arguments to
the ssbo loads (since these are the ones we can re-use at the
moment).
---
 src/mesa/drivers/dri/i965/brw_link.cpp | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/src/mesa/drivers/dri/i965/brw_link.cpp b/src/mesa/drivers/dri/i965/brw_link.cpp
index fc9bee4..df3d0ec 100644
--- a/src/mesa/drivers/dri/i965/brw_link.cpp
+++ b/src/mesa/drivers/dri/i965/brw_link.cpp
@@ -159,6 +159,7 @@ process_glsl_ir(gl_shader_stage stage,
 
    lower_ubo_reference(shader, shader->ir);
 
+   bool first_pass = true;
    bool progress;
    do {
       progress = false;
@@ -176,6 +177,10 @@ process_glsl_ir(gl_shader_stage stage,
 
       progress = do_common_optimization(shader->ir, true, true,
                                         options, ctx->Const.NativeIntegers) || progress;
+      if (first_pass) {
+         progress = opt_ssbo_loads(shader, shader->ir) || progress;
+         first_pass = false;
+      }
    } while (progress);
 
    validate_ir_tree(shader->ir);
-- 
1.9.1