[Mesa-dev] [PATCH v2 01/11] i965: Introduce new SHADER_OPCODE_URB_WRITE_SIMD8_MASKED/PER_SLOT opcodes.
jason at jlekstrand.net
Wed Oct 21 10:28:07 PDT 2015
On Wed, Oct 21, 2015 at 1:29 AM, Kenneth Graunke <kenneth at whitecape.org> wrote:
> On Monday, October 12, 2015 02:49:03 PM Kenneth Graunke wrote:
>> In the vec4 backend, we have a vec4_instruction::urb_write_flags field.
>> There are many kinds of flags for SIMD4x2 messages.
>> However, there are really only two (per-slot offset, use channel masks)
>> for SIMD8 messages. Rather than adding a boolean flag for per-slot
>> offsets (polluting all instructions), I decided to just make three new
>> Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
>> src/mesa/drivers/dri/i965/brw_defines.h | 3 +++
>> src/mesa/drivers/dri/i965/brw_fs.cpp | 9 +++++++++
>> src/mesa/drivers/dri/i965/brw_fs_generator.cpp | 11 +++++++++++
>> src/mesa/drivers/dri/i965/brw_inst.h | 1 +
>> src/mesa/drivers/dri/i965/brw_shader.cpp | 9 +++++++++
>> 5 files changed, 33 insertions(+)
>> Here's the rest of the series that didn't get reviewed last time,
>> rebased on Jason's compiler reworks.
> Jason landed yet more compiler reworks. I've pushed a rebased copy
> to the 'simd8gs' branch of ~kwg/mesa. Code got shuffled between
> functions or header files, so some of it didn't textually apply, but
> the new code isn't significantly different. I've verified that it
> still builds and passes Piglit.
> Jason has yet *more* compiler reworks on the mailing list. I've
> preemptively rebased on those and pushed that to my tree as well.
> It's the 'simd8gs-rebase-rebase' branch. That branch doesn't
> compile, however - with the roundabout vec4/fs include hell, it's
> somehow getting an incomplete type for "struct brw_gs_compile".
> I didn't spend the time to figure out why. Other work to do.
You didn't have to do that...
Anyway, I'll poke at it and get the include stuff sorted.
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