[Mesa-dev] [PATCH 5/6] i965/fs: split out calculation of payload live ranges
Jason Ekstrand
jason at jlekstrand.net
Wed Oct 21 15:59:54 PDT 2015
Reviewed-by: Jason Ekstrand <jason.ekstrand at intel.com>
On Fri, Oct 2, 2015 at 2:37 PM, Connor Abbott <cwabbott0 at gmail.com> wrote:
> We'll need this for the scheduler too, since it wants to know when the
> live ranges of payload registers end in order to model them in our
> register pressure calculations.
>
> Signed-off-by: Connor Abbott <cwabbott0 at gmail.com>
> ---
> src/mesa/drivers/dri/i965/brw_fs.h | 2 +
> src/mesa/drivers/dri/i965/brw_fs_reg_allocate.cpp | 51 +++++++++++++----------
> 2 files changed, 31 insertions(+), 22 deletions(-)
>
> diff --git a/src/mesa/drivers/dri/i965/brw_fs.h b/src/mesa/drivers/dri/i965/brw_fs.h
> index a8b6726..160b09b 100644
> --- a/src/mesa/drivers/dri/i965/brw_fs.h
> +++ b/src/mesa/drivers/dri/i965/brw_fs.h
> @@ -141,6 +141,8 @@ public:
> void assign_vs_urb_setup();
> bool assign_regs(bool allow_spilling);
> void assign_regs_trivial();
> + void calculate_payload_ranges(int payload_node_count,
> + int *payload_last_use_ip);
> void setup_payload_interference(struct ra_graph *g, int payload_reg_count,
> int first_payload_node);
> int choose_spill_reg(struct ra_graph *g);
> diff --git a/src/mesa/drivers/dri/i965/brw_fs_reg_allocate.cpp b/src/mesa/drivers/dri/i965/brw_fs_reg_allocate.cpp
> index 6900cee..3f00479 100644
> --- a/src/mesa/drivers/dri/i965/brw_fs_reg_allocate.cpp
> +++ b/src/mesa/drivers/dri/i965/brw_fs_reg_allocate.cpp
> @@ -332,32 +332,12 @@ count_to_loop_end(const bblock_t *block)
> unreachable("not reached");
> }
>
> -/**
> - * Sets up interference between thread payload registers and the virtual GRFs
> - * to be allocated for program temporaries.
> - *
> - * We want to be able to reallocate the payload for our virtual GRFs, notably
> - * because the setup coefficients for a full set of 16 FS inputs takes up 8 of
> - * our 128 registers.
> - *
> - * The layout of the payload registers is:
> - *
> - * 0..payload.num_regs-1: fixed function setup (including bary coordinates).
> - * payload.num_regs..payload.num_regs+curb_read_lengh-1: uniform data
> - * payload.num_regs+curb_read_lengh..first_non_payload_grf-1: setup coefficients.
> - *
> - * And we have payload_node_count nodes covering these registers in order
> - * (note that in SIMD16, a node is two registers).
> - */
> -void
> -fs_visitor::setup_payload_interference(struct ra_graph *g,
> - int payload_node_count,
> - int first_payload_node)
> +void fs_visitor::calculate_payload_ranges(int payload_node_count,
> + int *payload_last_use_ip)
> {
> int loop_depth = 0;
> int loop_end_ip = 0;
>
> - int payload_last_use_ip[payload_node_count];
> for (int i = 0; i < payload_node_count; i++)
> payload_last_use_ip[i] = -1;
>
> @@ -428,6 +408,33 @@ fs_visitor::setup_payload_interference(struct ra_graph *g,
>
> ip++;
> }
> +}
> +
> +
> +/**
> + * Sets up interference between thread payload registers and the virtual GRFs
> + * to be allocated for program temporaries.
> + *
> + * We want to be able to reallocate the payload for our virtual GRFs, notably
> + * because the setup coefficients for a full set of 16 FS inputs takes up 8 of
> + * our 128 registers.
> + *
> + * The layout of the payload registers is:
> + *
> + * 0..payload.num_regs-1: fixed function setup (including bary coordinates).
> + * payload.num_regs..payload.num_regs+curb_read_lengh-1: uniform data
> + * payload.num_regs+curb_read_lengh..first_non_payload_grf-1: setup coefficients.
> + *
> + * And we have payload_node_count nodes covering these registers in order
> + * (note that in SIMD16, a node is two registers).
> + */
> +void
> +fs_visitor::setup_payload_interference(struct ra_graph *g,
> + int payload_node_count,
> + int first_payload_node)
> +{
> + int payload_last_use_ip[payload_node_count];
> + calculate_payload_ranges(payload_node_count, payload_last_use_ip);
>
> for (int i = 0; i < payload_node_count; i++) {
> if (payload_last_use_ip[i] == -1)
> --
> 2.1.0
>
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