[Mesa-dev] [PATCH 2/9] i965: Fill out instruction list.

[Matt Turner]

On Thu, Oct 22, 2015 at 3:58 AM, Emil Velikov <emil.l.velikov at gmail.com> wrote:
> On 21 October 2015 at 23:58, Matt Turner <mattst88 at gmail.com> wrote:
>> Add some instructions: illegal, movi, sends, sendsc.
>>
>> Remove some instructions with reused opcodes: msave, mrestore, push,
>> pop, goto. I did have some gross code for disassembling opcodes
>> per-generation, but there's very little meaningful overlap so it's
>> probably not needed.
>> ---
>>  src/mesa/drivers/dri/i965/brw_defines.h  | 37 ++++++++++++++++++++++++++------
>>  src/mesa/drivers/dri/i965/brw_disasm.c   | 16 ++++++++------
>>  src/mesa/drivers/dri/i965/brw_shader.cpp |  2 +-
>>  3 files changed, 41 insertions(+), 14 deletions(-)
>>
>> diff --git a/src/mesa/drivers/dri/i965/brw_defines.h b/src/mesa/drivers/dri/i965/brw_defines.h
>> index 393f17a..26fc0af 100644
>> --- a/src/mesa/drivers/dri/i965/brw_defines.h
>> +++ b/src/mesa/drivers/dri/i965/brw_defines.h
>> @@ -838,43 +838,62 @@ enum PACKED brw_horizontal_stride {
>>
>>  enum opcode {
>>     /* These are the actual hardware opcodes. */
>> +   BRW_OPCODE_ILLEGAL = 0,
>>     BRW_OPCODE_MOV =    1,
>>     BRW_OPCODE_SEL =    2,
>> +   BRW_OPCODE_MOVI =   3,   /**< G45+ */
>>     BRW_OPCODE_NOT =    4,
>>     BRW_OPCODE_AND =    5,
>>     BRW_OPCODE_OR =     6,
>>     BRW_OPCODE_XOR =    7,
>>     BRW_OPCODE_SHR =    8,
>>     BRW_OPCODE_SHL =    9,
>> +   // BRW_OPCODE_DIM = 10,  /**< Gen7.5 only */ /* Reused */
>> +   // BRW_OPCODE_SMOV =        10,  /**< Gen8+       */ /* Reused */
>> +   /* Reserved - 11 */
>>     BRW_OPCODE_ASR =    12,
>> +   /* Reserved - 13-15 */
>>     BRW_OPCODE_CMP =    16,
>>     BRW_OPCODE_CMPN =   17,
>>     BRW_OPCODE_CSEL =   18,  /**< Gen8+ */
>>     BRW_OPCODE_F32TO16 = 19,  /**< Gen7 only */
>>     BRW_OPCODE_F16TO32 = 20,  /**< Gen7 only */
>> +   /* Reserved - 21-22 */
>>     BRW_OPCODE_BFREV =  23,  /**< Gen7+ */
>>     BRW_OPCODE_BFE =    24,  /**< Gen7+ */
>>     BRW_OPCODE_BFI1 =   25,  /**< Gen7+ */
>>     BRW_OPCODE_BFI2 =   26,  /**< Gen7+ */
>> +   /* Reserved - 27-31 */
>>     BRW_OPCODE_JMPI =   32,
>> +   // BRW_OPCODE_BRD = 33,  /**< Gen7+ */
>>     BRW_OPCODE_IF =     34,
>> -   BRW_OPCODE_IFF =    35,  /**< Pre-Gen6 */
>> +   BRW_OPCODE_IFF =    35,  /**< Pre-Gen6    */ /* Reused */
>> +   // BRW_OPCODE_BRC = 35,  /**< Gen7+       */ /* Reused */
>>     BRW_OPCODE_ELSE =   36,
>>     BRW_OPCODE_ENDIF =  37,
>> -   BRW_OPCODE_DO =     38,
>> +   BRW_OPCODE_DO =     38,  /**< Pre-Gen6    */ /* Reused */
>> +   // BRW_OPCODE_CASE =        38,  /**< Gen6 only   */ /* Reused */
>>     BRW_OPCODE_WHILE =  39,
>>     BRW_OPCODE_BREAK =  40,
>>     BRW_OPCODE_CONTINUE = 41,
>>     BRW_OPCODE_HALT =   42,
>> -   BRW_OPCODE_MSAVE =  44,  /**< Pre-Gen6 */
>> -   BRW_OPCODE_MRESTORE = 45, /**< Pre-Gen6 */
>> -   BRW_OPCODE_PUSH =   46,  /**< Pre-Gen6 */
>> -   BRW_OPCODE_GOTO =   46,  /**< Gen8+    */
>> -   BRW_OPCODE_POP =    47,  /**< Pre-Gen6 */
>> +   // BRW_OPCODE_CALLA =       43,  /**< Gen7.5+     */
>> +   // BRW_OPCODE_MSAVE =       44,  /**< Pre-Gen6    */ /* Reused */
>> +   // BRW_OPCODE_CALL =        44,  /**< Gen6+       */ /* Reused */
>> +   // BRW_OPCODE_MREST =       45,  /**< Pre-Gen6    */ /* Reused */
>> +   // BRW_OPCODE_RET = 45,  /**< Gen6+       */ /* Reused */
>> +   // BRW_OPCODE_PUSH =        46,  /**< Pre-Gen6    */ /* Reused */
>> +   // BRW_OPCODE_FORK =        46,  /**< Gen6 only   */ /* Reused */
>> +   // BRW_OPCODE_GOTO =        46,  /**< Gen8+       */ /* Reused */
>> +   // BRW_OPCODE_POP = 47,  /**< Pre-Gen6    */
>>     BRW_OPCODE_WAIT =   48,
>>     BRW_OPCODE_SEND =   49,
>>     BRW_OPCODE_SENDC =  50,
>> +   BRW_OPCODE_SENDS =  51,  /**< Gen9+ */
>> +   BRW_OPCODE_SENDSC = 52,  /**< Gen9+ */
>> +   /* Reserved 53-55 */
>>     BRW_OPCODE_MATH =   56,  /**< Gen6+ */
>> +   /* Reserved 57-63 */
>>     BRW_OPCODE_ADD =    64,
>>     BRW_OPCODE_MUL =    65,
>>     BRW_OPCODE_AVG =    66,
>> @@ -893,14 +912,18 @@ enum opcode {
>>     BRW_OPCODE_SUBB =   79,  /**< Gen7+ */
>>     BRW_OPCODE_SAD2 =   80,
>>     BRW_OPCODE_SADA2 =  81,
>> +   /* Reserved 82-83 */
>>     BRW_OPCODE_DP4 =    84,
>>     BRW_OPCODE_DPH =    85,
>>     BRW_OPCODE_DP3 =    86,
>>     BRW_OPCODE_DP2 =    87,
>> +   /* Reserved 88 */
>>     BRW_OPCODE_LINE =   89,
>>     BRW_OPCODE_PLN =    90,  /**< G45+ */
>>     BRW_OPCODE_MAD =    91,  /**< Gen6+ */
>>     BRW_OPCODE_LRP =    92,  /**< Gen6+ */
>> +   // BRW_OPCODE_MADM =        93,  /**< Gen8+ */
>> +   /* Reserved 94-124 */
>>     BRW_OPCODE_NENOP =  125, /**< G45 only */
>>     BRW_OPCODE_NOP =    126,
>>
>> diff --git a/src/mesa/drivers/dri/i965/brw_disasm.c b/src/mesa/drivers/dri/i965/brw_disasm.c
>> index db23a18..c2dac7c 100644
>> --- a/src/mesa/drivers/dri/i965/brw_disasm.c
>> +++ b/src/mesa/drivers/dri/i965/brw_disasm.c
>> @@ -34,6 +34,7 @@
>>
>>  const struct opcode_desc opcode_descs[128] = {
> Out of curiosity: I cannot see an opcode numerically equal to 127, is
> there one ? What if one drops the explicit array size here (and in
> later patch) in order to get a lovely build error (by adding a
> static_assert) ?

You're right, there is no opcode 127. I'll add a /* Reserved 127 */
after NOP to this patch.

Statically asserting the side of an array makes sense when its size is
defined only by the things in it... but replacing a fixed size array
with an unsized array + a placeholder opcode-127 + a static assert
doesn't seem beneficial.