[Mesa-dev] [PATCH] radeon/uvd: don't expose HEVC on old UVD hw (v2)

[Christian König]

On 22.10.2015 19:50, Alex Deucher wrote:
> The section for UVD 2 and older was not updated
> when HEVC support was added. Reported by Kano
> on irc.
>
> v2: integrate the UVD2 and older checks into the
> main switch statement.
>
> Signed-off-by: Alex Deucher <alexander.deucher at amd.com>
> Cc: mesa-stable at lists.freedesktop.org
> ---
>   src/gallium/drivers/radeon/radeon_video.c | 46 ++++++++++++-------------------
>   1 file changed, 17 insertions(+), 29 deletions(-)
>
> diff --git a/src/gallium/drivers/radeon/radeon_video.c b/src/gallium/drivers/radeon/radeon_video.c
> index 3a1834b..a874270 100644
> --- a/src/gallium/drivers/radeon/radeon_video.c
> +++ b/src/gallium/drivers/radeon/radeon_video.c
> @@ -205,6 +205,7 @@ int rvid_get_video_param(struct pipe_screen *screen,
>   			 enum pipe_video_cap param)
>   {
>   	struct r600_common_screen *rscreen = (struct r600_common_screen *)screen;
> +	enum pipe_video_format codec = u_reduce_video_profile(profile);
>   
>   	if (entrypoint == PIPE_VIDEO_ENTRYPOINT_ENCODE) {
>   		switch (param) {
> @@ -232,34 +233,17 @@ int rvid_get_video_param(struct pipe_screen *screen,
>   		}
>   	}
>   
> -	/* UVD 2.x limits */
> -	if (rscreen->family < CHIP_PALM) {
> -		enum pipe_video_format codec = u_reduce_video_profile(profile);
> -		switch (param) {
> -		case PIPE_VIDEO_CAP_SUPPORTED:
> -			/* no support for MPEG4 */
> -			return codec != PIPE_VIDEO_FORMAT_MPEG4 &&
> -			       /* FIXME: VC-1 simple/main profile is broken */
> -			       profile != PIPE_VIDEO_PROFILE_VC1_SIMPLE &&
> -			       profile != PIPE_VIDEO_PROFILE_VC1_MAIN;
> -		case PIPE_VIDEO_CAP_PREFERS_INTERLACED:
> -		case PIPE_VIDEO_CAP_SUPPORTS_INTERLACED:
> -			/* MPEG2 only with shaders and no support for
> -			   interlacing on R6xx style UVD */
> -			return codec != PIPE_VIDEO_FORMAT_MPEG12 &&
> -			       rscreen->family > CHIP_RV770;
> -		default:
> -			break;
> -		}
> -	}
> -
>   	switch (param) {
>   	case PIPE_VIDEO_CAP_SUPPORTED:
> -		switch (u_reduce_video_profile(profile)) {
> +		switch (codec) {
>   		case PIPE_VIDEO_FORMAT_MPEG12:
>   		case PIPE_VIDEO_FORMAT_MPEG4:
>   		case PIPE_VIDEO_FORMAT_MPEG4_AVC:
> -			return entrypoint != PIPE_VIDEO_ENTRYPOINT_ENCODE;
> +			if (rscreen->family < CHIP_PALM)
> +				/* no support for MPEG4 */
> +				return codec != PIPE_VIDEO_FORMAT_MPEG4;
> +			else
> +				return entrypoint != PIPE_VIDEO_ENTRYPOINT_ENCODE;
On UVD 2.x we don't support video encoding either. So the check should 
probably be:

if (entrypoint == PIPE_VIDEO_ENTRYPOINT_ENCODE)
     return false;

if (rscreen->family < CHIP_PALM)
     /* no support for MPEG4 */
     return codec != PIPE_VIDEO_FORMAT_MPEG4;

return true;

>   		case PIPE_VIDEO_FORMAT_VC1:
>   			/* FIXME: VC-1 simple/main profile is broken */
>   			return profile == PIPE_VIDEO_PROFILE_VC1_ADVANCED &&
> @@ -280,13 +264,17 @@ int rvid_get_video_param(struct pipe_screen *screen,
>   	case PIPE_VIDEO_CAP_PREFERED_FORMAT:
>   		return PIPE_FORMAT_NV12;
>   	case PIPE_VIDEO_CAP_PREFERS_INTERLACED:
> -		if (u_reduce_video_profile(profile) == PIPE_VIDEO_FORMAT_HEVC)
> -			return false; //The hardware doesn't support interlaced HEVC.
> -		return true;
>   	case PIPE_VIDEO_CAP_SUPPORTS_INTERLACED:
> -		if (u_reduce_video_profile(profile) == PIPE_VIDEO_FORMAT_HEVC)
> -			return false; //The hardware doesn't support interlaced HEVC.
> -		return true;
> +		if (rscreen->family < CHIP_PALM) {
> +			/* MPEG2 only with shaders and no support for
> +			   interlacing on R6xx style UVD */
> +			return codec != PIPE_VIDEO_FORMAT_MPEG12 &&
> +			       rscreen->family > CHIP_RV770;
> +		} else {
> +			if (u_reduce_video_profile(profile) == PIPE_VIDEO_FORMAT_HEVC)
> +				return false; //The hardware doesn't support interlaced HEVC.

Actually it's the firmware which doesn't support this and IIRC there are 
plans to get it working.

Regards,
Christian.

> +			return true;
> +		}
>   	case PIPE_VIDEO_CAP_SUPPORTS_PROGRESSIVE:
>   		return true;
>   	case PIPE_VIDEO_CAP_MAX_LEVEL: