[Mesa-dev] [PATCH v3 5/7] radeonsi: Implement DCC fast clear.
Bas Nieuwenhuizen
bas at basnieuwenhuizen.nl
Fri Oct 23 03:17:03 PDT 2015
On Thu, Oct 22, 2015 at 12:12 PM, Marek Olšák <maraeo at gmail.com> wrote:
>> diff --git a/src/gallium/drivers/radeonsi/si_descriptors.c b/src/gallium/drivers/radeonsi/si_descriptors.c
>> index 5548cba3..a277fa5 100644
>> --- a/src/gallium/drivers/radeonsi/si_descriptors.c
>> +++ b/src/gallium/drivers/radeonsi/si_descriptors.c
>> @@ -234,7 +234,7 @@ static void si_set_sampler_views(struct pipe_context *ctx,
>> } else {
>> samplers->depth_texture_mask &= ~(1 << slot);
>> }
>> - if (rtex->cmask.size || rtex->fmask.size) {
>> + if (rtex->cmask.size || rtex->fmask.size || rtex->surface.dcc_enabled) {
>> samplers->compressed_colortex_mask |= 1 << slot;
>
> I'd like this flag to be set only when dirty_level_mask is non-zero.
> Setting this for all textures that have DCC is quite expensive in draw
> calls.
I think this code is incorrect even without considering DCC. If we do
a fast clear on a surface which allocates a cmask and then use that
surface as a texture without calling set_sampler_views in between
(because it was bound before) we get a stale compressed_colortex_mask.
Some testing shows that this can be triggered using OpenGL, although
the GL_ARB_texture_barrier extension may be needed to make the result
not undefined per the specification.
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