[Mesa-dev] [PATCH 1/2] i965/fs: Use UD type for offsets in VARYING_PULL_CONSTANT_LOAD
Jason Ekstrand
jason at jlekstrand.net
Wed Apr 13 21:16:19 UTC 2016
Reveiewed-by: Kristian Høgsberg <krh at bitplanet.net>
---
src/mesa/drivers/dri/i965/brw_fs.cpp | 2 +-
src/mesa/drivers/dri/i965/brw_fs_nir.cpp | 5 +++--
2 files changed, 4 insertions(+), 3 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp b/src/mesa/drivers/dri/i965/brw_fs.cpp
index 954f782..944ad4d 100644
--- a/src/mesa/drivers/dri/i965/brw_fs.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs.cpp
@@ -174,7 +174,7 @@ fs_visitor::VARYING_PULL_CONSTANT_LOAD(const fs_builder &bld,
* CSE can later notice that those loads are all the same and eliminate
* the redundant ones.
*/
- fs_reg vec4_offset = vgrf(glsl_type::int_type);
+ fs_reg vec4_offset = vgrf(glsl_type::uint_type);
bld.ADD(vec4_offset, varying_offset, brw_imm_ud(const_offset & ~0xf));
int scale = 1;
diff --git a/src/mesa/drivers/dri/i965/brw_fs_nir.cpp b/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
index bd6314a..7c55a67 100644
--- a/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
@@ -2643,7 +2643,8 @@ fs_visitor::nir_emit_intrinsic(const fs_builder &bld, nir_intrinsic_instr *instr
assert(const_offset->u32[0] % 4 == 0);
src.reg_offset = const_offset->u32[0] / 4;
} else {
- src.reladdr = new(mem_ctx) fs_reg(get_nir_src(instr->src[0]));
+ src.reladdr = new(mem_ctx) fs_reg(retype(get_nir_src(instr->src[0]),
+ BRW_REGISTER_TYPE_UD));
}
for (unsigned j = 0; j < instr->num_components; j++) {
@@ -2682,7 +2683,7 @@ fs_visitor::nir_emit_intrinsic(const fs_builder &bld, nir_intrinsic_instr *instr
nir_const_value *const_offset = nir_src_as_const_value(instr->src[1]);
if (const_offset == NULL) {
fs_reg base_offset = retype(get_nir_src(instr->src[1]),
- BRW_REGISTER_TYPE_D);
+ BRW_REGISTER_TYPE_UD);
for (int i = 0; i < instr->num_components; i++)
VARYING_PULL_CONSTANT_LOAD(bld, offset(dest, bld, i), surf_index,
--
2.5.0.400.gff86faf
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