[Mesa-dev] [PATCH 2/2] i965/vec4: Use UD rather than D for uniform indirects
Jason Ekstrand
jason at jlekstrand.net
Wed Apr 13 21:16:20 UTC 2016
---
src/mesa/drivers/dri/i965/brw_vec4_nir.cpp | 2 +-
src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp | 10 +++++-----
2 files changed, 6 insertions(+), 6 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_vec4_nir.cpp b/src/mesa/drivers/dri/i965/brw_vec4_nir.cpp
index e4e8c38..4516c9a 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4_nir.cpp
+++ b/src/mesa/drivers/dri/i965/brw_vec4_nir.cpp
@@ -709,7 +709,7 @@ vec4_visitor::nir_emit_intrinsic(nir_intrinsic_instr *instr)
assert(const_offset->u32[0] % 16 == 0);
src.reg_offset = const_offset->u32[0] / 16;
} else {
- src_reg tmp = get_nir_src(instr->src[0], BRW_REGISTER_TYPE_D, 1);
+ src_reg tmp = get_nir_src(instr->src[0], BRW_REGISTER_TYPE_UD, 1);
src.reladdr = new(mem_ctx) src_reg(tmp);
}
diff --git a/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp b/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp
index a06d696..c7cf33f 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp
+++ b/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp
@@ -758,7 +758,7 @@ vec4_visitor::emit_pull_constant_load_reg(dst_reg dst,
pull->mlen = 2;
pull->header_size = 1;
} else if (devinfo->gen >= 7) {
- dst_reg grf_offset = dst_reg(this, glsl_type::int_type);
+ dst_reg grf_offset = dst_reg(this, glsl_type::uint_type);
grf_offset.type = offset_reg.type;
@@ -1594,14 +1594,14 @@ vec4_visitor::emit_pull_constant_load(bblock_t *block, vec4_instruction *inst,
src_reg offset;
if (orig_src.reladdr) {
- offset = src_reg(this, glsl_type::int_type);
+ offset = src_reg(this, glsl_type::uint_type);
emit_before(block, inst, ADD(dst_reg(offset), *orig_src.reladdr,
- brw_imm_d(reg_offset * 16)));
+ brw_imm_ud(reg_offset * 16)));
} else if (devinfo->gen >= 8) {
/* Store the offset in a GRF so we can send-from-GRF. */
- offset = src_reg(this, glsl_type::int_type);
- emit_before(block, inst, MOV(dst_reg(offset), brw_imm_d(reg_offset * 16)));
+ offset = src_reg(this, glsl_type::uint_type);
+ emit_before(block, inst, MOV(dst_reg(offset), brw_imm_ud(reg_offset * 16)));
} else {
offset = brw_imm_d(reg_offset * 16);
}
--
2.5.0.400.gff86faf
More information about the mesa-dev
mailing list