[Mesa-dev] [PATCH 06/40] i965/blorp/gen7: Prepare re-using for gen8

Topi Pohjolainen topi.pohjolainen at intel.com
Sat Apr 16 13:42:34 UTC 2016


Signed-off-by: Topi Pohjolainen <topi.pohjolainen at intel.com>
---
 src/mesa/drivers/dri/i965/gen7_blorp.cpp | 6 ++++--
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/gen7_blorp.cpp b/src/mesa/drivers/dri/i965/gen7_blorp.cpp
index eae1e30..4debeb3 100644
--- a/src/mesa/drivers/dri/i965/gen7_blorp.cpp
+++ b/src/mesa/drivers/dri/i965/gen7_blorp.cpp
@@ -47,7 +47,9 @@
 static void
 gen7_blorp_emit_urb_config(struct brw_context *brw)
 {
-   unsigned urb_size = (brw->is_haswell && brw->gt == 3) ? 32 : 16;
+   const unsigned urb_size =
+      (brw->gen >= 8 || (brw->is_haswell && brw->gt == 3)) ? 32 : 16;
+
    gen7_emit_push_constant_state(brw,
                                  urb_size / 2 /* vs_size */,
                                  0 /* hs_size */,
@@ -348,7 +350,7 @@ gen7_blorp_emit_gs_disable(struct brw_context *brw)
     * whole fixed function pipeline" means to emit a PIPE_CONTROL with the "CS
     * Stall" bit set.
     */
-   if (!brw->is_haswell && brw->gt == 2 && brw->gs.enabled)
+   if (brw->gen < 8 && !brw->is_haswell && brw->gt == 2 && brw->gs.enabled)
       gen7_emit_cs_stall_flush(brw);
 
    BEGIN_BATCH(7);
-- 
2.5.5



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