[Mesa-dev] [PATCH 38/40] i965/blorp: Use more fine grained state trashing than new context

[Topi Pohjolainen]

which results into, for example, urb configuration to be re-emitted
even though it is not needed. There are a few emitters that rely
solely on BRW_NEW_CONTEXT in driver state. These can be addressed
using GL-state instead (similarly to gen8_hiz_exec()):

   gen6_sf_state: _NEW_PROGRAM
   gen7_sf_state: _NEW_PROGRAM
   gen8_sf_state: _NEW_PROGRAM
   gen6_depth_stencil_state: _NEW_DEPTH
   gen8_wm_depth_stencil: _NEW_DEPTH
   brw_depthbuffer: _NEW_BUFFERS

Emitters tracked by compute pipeline monitor atoms other than
BRW_NEW_CONTEXT and therefore do not need special treatment.

Otherwise clearing with blorp will regress performance in some
synthetic test cases on BDW.

Signed-off-by: Topi Pohjolainen <topi.pohjolainen at intel.com>
---
 src/mesa/drivers/dri/i965/brw_blorp.cpp | 7 +++++--
 1 file changed, 5 insertions(+), 2 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/brw_blorp.cpp b/src/mesa/drivers/dri/i965/brw_blorp.cpp
index 04a2a74..5ffc5b4 100644
--- a/src/mesa/drivers/dri/i965/brw_blorp.cpp
+++ b/src/mesa/drivers/dri/i965/brw_blorp.cpp
@@ -286,11 +286,14 @@ retry:
 
    const uint64_t do_not_smash_bits = BRW_NEW_URB_SIZE |
                                       BRW_NEW_STATE_BASE_ADDRESS |
-                                      BRW_NEW_BATCH;
+                                      BRW_NEW_BATCH |
+                                      BRW_NEW_CONTEXT;
 
-   /* We've smashed all state compared to what the normal 3D pipeline
+   /* We've smashed state compared to what the normal 3D pipeline
     * rendering tracks for GL.
     */
+   brw->state.pipelines[BRW_RENDER_PIPELINE].mesa |=
+      (_NEW_DEPTH | _NEW_BUFFERS | _NEW_PROGRAM);
    brw->ctx.NewDriverState |= ~do_not_smash_bits;
    brw->no_depth_or_stencil = false;
    brw->ib.type = -1;
-- 
2.5.5