[Mesa-dev] [PATCH 3/5] i965/vec4: Use nir_intrinsic_base in the load_uniform implementation
Iago Toral
itoral at igalia.com
Wed Apr 20 14:18:40 UTC 2016
Patched 3-5 are:
Reviewed-by: Iago Toral Quiroga <itoral at igalia.com>
On Mon, 2016-04-18 at 19:04 -0700, Jason Ekstrand wrote:
> We shouldn't be reading the const_index directly
> ---
> src/mesa/drivers/dri/i965/brw_vec4_nir.cpp | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/src/mesa/drivers/dri/i965/brw_vec4_nir.cpp b/src/mesa/drivers/dri/i965/brw_vec4_nir.cpp
> index e199d96..b5c23c9 100644
> --- a/src/mesa/drivers/dri/i965/brw_vec4_nir.cpp
> +++ b/src/mesa/drivers/dri/i965/brw_vec4_nir.cpp
> @@ -691,7 +691,7 @@ vec4_visitor::nir_emit_intrinsic(nir_intrinsic_instr *instr)
>
> dest = get_nir_dest(instr->dest);
>
> - src = src_reg(dst_reg(UNIFORM, instr->const_index[0] / 16));
> + src = src_reg(dst_reg(UNIFORM, nir_intrinsic_base(instr) / 16));
> src.type = dest.type;
>
> /* Uniforms don't actually have to be vec4 aligned. In the case that
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