[Mesa-dev] [PATCH 5/7] gk110/ir: add emission for VSHL
Ilia Mirkin
imirkin at alum.mit.edu
Wed Apr 20 20:36:22 UTC 2016
Reviewed-by: Ilia Mirkin <imirkin at alum.mit.edu>
On Wed, Apr 20, 2016 at 4:25 PM, Samuel Pitoiset
<samuel.pitoiset at gmail.com> wrote:
> Signed-off-by: Samuel Pitoiset <samuel.pitoiset at gmail.com>
> ---
> .../drivers/nouveau/codegen/nv50_ir_emit_gk110.cpp | 58 ++++++++++++++++++++++
> 1 file changed, 58 insertions(+)
>
> diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gk110.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gk110.cpp
> index 15280df..2bad6fe 100644
> --- a/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gk110.cpp
> +++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gk110.cpp
> @@ -140,6 +140,9 @@ private:
> void emitSUCLAMPMode(uint16_t);
> void emitSUCalc(Instruction *);
>
> + void emitVSHL(const Instruction *);
> + void emitVectorSubOp(const Instruction *);
> +
> inline void defId(const ValueDef&, const int pos);
> inline void srcId(const ValueRef&, const int pos);
> inline void srcId(const ValueRef *, const int pos);
> @@ -1675,6 +1678,58 @@ CodeEmitterGK110::emitSUCalc(Instruction *i)
> }
> }
>
> +
> +void
> +CodeEmitterGK110::emitVectorSubOp(const Instruction *i)
> +{
> + switch (NV50_IR_SUBOP_Vn(i->subOp)) {
> + case 0:
> + code[1] |= (i->subOp & 0x000f) << 7; // vsrc1
> + code[1] |= (i->subOp & 0x00e0) >> 6; // vsrc2
> + code[1] |= (i->subOp & 0x0100) << 13; // vsrc2
> + code[1] |= (i->subOp & 0x3c00) << 12; // vdst
> + break;
> + default:
> + assert(0);
> + break;
> + }
> +}
> +
> +void
> +CodeEmitterGK110::emitVSHL(const Instruction *i)
> +{
> + code[0] = 0x00000002;
> + code[1] = 0xb8000000;
> +
> + assert(NV50_IR_SUBOP_Vn(i->subOp) == 0);
> +
> + if (isSignedType(i->dType)) code[1] |= 1 << 25;
> + if (isSignedType(i->sType)) code[1] |= 1 << 19;
> +
> + emitVectorSubOp(i);
> +
> + emitPredicate(i);
> + defId(i->def(0), 2);
> + srcId(i->src(0), 10);
> +
> + if (i->getSrc(1)->reg.file == FILE_IMMEDIATE) {
> + ImmediateValue *imm = i->getSrc(1)->asImm();
> + assert(imm);
> + code[0] |= (imm->reg.data.u32 & 0x01ff) << 23;
> + code[1] |= (imm->reg.data.u32 & 0xfe00) >> 9;
> + } else {
> + assert(i->getSrc(1)->reg.file == FILE_GPR);
> + code[1] |= 1 << 21;
> + srcId(i->src(1), 23);
> + }
> + srcId(i->src(2), 42);
> +
> + if (i->saturate)
> + code[0] |= 1 << 22;
> + if (i->flagsDef >= 0)
> + code[1] |= 1 << 18;
> +}
> +
> void
> CodeEmitterGK110::emitAFETCH(const Instruction *i)
> {
> @@ -2413,6 +2468,9 @@ CodeEmitterGK110::emitInstruction(Instruction *insn)
> case OP_SUEAU:
> emitSUCalc(insn);
> break;
> + case OP_VSHL:
> + emitVSHL(insn);
> + break;
> case OP_PHI:
> case OP_UNION:
> case OP_CONSTRAINT:
> --
> 2.8.0
>
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