[Mesa-dev] [PATCH 2/5] i965: Mark URB reads as volatile.

[Eduardo Lima Mitev]

Patches 1 and 2 are:

Reviewed-by: Eduardo Lima Mitev <elima at igalia.com>

On 04/22/2016 07:32 AM, Kenneth Graunke wrote:
> They can be affected by URB writes.
> 
> In the upcoming scalar TCS backend, this prevents read-modify-write
> cycles from being broken by CSE removing reads.
> 
> Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
> ---
>  src/mesa/drivers/dri/i965/brw_shader.cpp | 3 +++
>  1 file changed, 3 insertions(+)
> 
> diff --git a/src/mesa/drivers/dri/i965/brw_shader.cpp b/src/mesa/drivers/dri/i965/brw_shader.cpp
> index b3aade1..d9e654c 100644
> --- a/src/mesa/drivers/dri/i965/brw_shader.cpp
> +++ b/src/mesa/drivers/dri/i965/brw_shader.cpp
> @@ -961,6 +961,9 @@ backend_instruction::is_volatile() const
>     case SHADER_OPCODE_UNTYPED_SURFACE_READ_LOGICAL:
>     case SHADER_OPCODE_TYPED_SURFACE_READ:
>     case SHADER_OPCODE_TYPED_SURFACE_READ_LOGICAL:
> +   case SHADER_OPCODE_URB_READ_SIMD8:
> +   case SHADER_OPCODE_URB_READ_SIMD8_PER_SLOT:
> +   case VEC4_OPCODE_URB_READ:
>        return true;
>     default:
>        return false;
>